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authorLaurent Vivier <laurent@vivier.eu>2018-03-12 21:27:21 +0100
committerLaurent Vivier <laurent@vivier.eu>2018-03-13 16:34:09 +0100
commit47446c9ce34b6685ffe20e829ff6c9aaefd3af0a (patch)
tree051db46e123de533ce97a81b9d28cbfbb4442db2 /target/m68k
parent68d0ed37866de2c5cafc4e2589e263961b2e8cd6 (diff)
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target/m68k: implement fsincos
using floatx80_sin() and floatx80_cos() Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180312202728.23790-5-laurent@vivier.eu>
Diffstat (limited to 'target/m68k')
-rw-r--r--target/m68k/fpu_helper.c11
-rw-r--r--target/m68k/helper.h1
-rw-r--r--target/m68k/translate.c8
3 files changed, 20 insertions, 0 deletions
diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c
index 71df19c..36e34d4 100644
--- a/target/m68k/fpu_helper.c
+++ b/target/m68k/fpu_helper.c
@@ -607,3 +607,14 @@ void HELPER(fcos)(CPUM68KState *env, FPReg *res, FPReg *val)
{
res->d = floatx80_cos(val->d, &env->fp_status);
}
+
+void HELPER(fsincos)(CPUM68KState *env, FPReg *res0, FPReg *res1, FPReg *val)
+{
+ floatx80 a = val->d;
+ /* If res0 and res1 specify the same floating-point data register,
+ * the sine result is stored in the register, and the cosine
+ * result is discarded.
+ */
+ res1->d = floatx80_cos(a, &env->fp_status);
+ res0->d = floatx80_sin(a, &env->fp_status);
+}
diff --git a/target/m68k/helper.h b/target/m68k/helper.h
index 767baf7..a168ffb 100644
--- a/target/m68k/helper.h
+++ b/target/m68k/helper.h
@@ -78,6 +78,7 @@ DEF_HELPER_3(ftentox, void, env, fp, fp)
DEF_HELPER_3(ftan, void, env, fp, fp)
DEF_HELPER_3(fsin, void, env, fp, fp)
DEF_HELPER_3(fcos, void, env, fp, fp)
+DEF_HELPER_4(fsincos, void, env, fp, fp, fp)
DEF_HELPER_3(mac_move, void, env, i32, i32)
DEF_HELPER_3(macmulf, i64, env, i32, i32)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index f47388d..a78edd8 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -5159,6 +5159,14 @@ DISAS_INSN(fpu)
case 0x6c: /* fdsub */
gen_helper_fdsub(cpu_env, cpu_dest, cpu_src, cpu_dest);
break;
+ case 0x30: case 0x31: case 0x32:
+ case 0x33: case 0x34: case 0x35:
+ case 0x36: case 0x37: {
+ TCGv_ptr cpu_dest2 = gen_fp_ptr(REG(ext, 0));
+ gen_helper_fsincos(cpu_env, cpu_dest, cpu_dest2, cpu_src);
+ tcg_temp_free_ptr(cpu_dest2);
+ }
+ break;
case 0x38: /* fcmp */
gen_helper_fcmp(cpu_env, cpu_src, cpu_dest);
return;