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authorLucien Murray-Pitts <lucienmp.qemu@gmail.com>2021-02-01 01:01:52 +0100
committerLaurent Vivier <laurent@vivier.eu>2021-02-11 21:10:01 +0100
commit8df0e6aedad33c6746f4bc2a4d0cfdd432877084 (patch)
treeba2a57bb5241be8ed31e0bddca36733011d70696 /target/m68k/translate.c
parent5736526ce2da32205022b10dcdf9807e735e451a (diff)
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m68k: MOVEC insn. should generate exception if wrong CR is accessed
Add CPU class detection for each CR type in the m68k_move_to/from helpers, so that it throws and exception if an unsupported register is requested for that CPU class. Reclassified MOVEC insn. as only supported from 68010. Signed-off-by: Lucien Murray-Pitts <lucienmp.qemu@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <fc0d0187478716f05d990949347071969b743151.1612137712.git.balaton@eik.bme.hu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'target/m68k/translate.c')
-rw-r--r--target/m68k/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 133a404..ac936eb 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -6010,7 +6010,7 @@ void register_m68k_insns (CPUM68KState *env)
BASE(stop, 4e72, ffff);
BASE(rte, 4e73, ffff);
INSN(cf_movec, 4e7b, ffff, CF_ISA_A);
- INSN(m68k_movec, 4e7a, fffe, M68000);
+ INSN(m68k_movec, 4e7a, fffe, MOVEC);
#endif
BASE(nop, 4e71, ffff);
INSN(rtd, 4e74, ffff, RTD);