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author | Peter Maydell <peter.maydell@linaro.org> | 2021-03-12 18:56:56 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2021-03-12 18:56:56 +0000 |
commit | 8e6bc6cdc82d45f203bc9fc4342c0452214c74fe (patch) | |
tree | 04bfff6f6d509d0d3e63e2d7eecc9529fd20d9b3 /target/m68k/op_helper.c | |
parent | 3f8d1885e48e4d72eab0688f604de62e0aea7a38 (diff) | |
parent | a9431a03f70c8c711a870d4c1a0439bdbb4703cf (diff) | |
download | qemu-8e6bc6cdc82d45f203bc9fc4342c0452214c74fe.zip qemu-8e6bc6cdc82d45f203bc9fc4342c0452214c74fe.tar.gz qemu-8e6bc6cdc82d45f203bc9fc4342c0452214c74fe.tar.bz2 |
Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-6.0-pull-request' into staging
Prepare MacOS ROM support:
- add RTR instruction
- fix unaligned access requirement
- fix ATC bit (68040 MMU)
# gpg: Signature made Thu 11 Mar 2021 22:18:11 GMT
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* remotes/vivier/tags/m68k-for-6.0-pull-request:
target/m68k: add M68K_FEATURE_UNALIGNED_DATA feature
target/m68k: reformat m68k_features enum
target/m68k: don't set SSW ATC bit for physical bus errors
target/m68k: implement rtr instruction
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/m68k/op_helper.c')
-rw-r--r-- | target/m68k/op_helper.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 9b0698f..ae1ba4b 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -348,7 +348,10 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) cpu_m68k_set_sr(env, sr); sp = env->aregs[7]; - sp &= ~1; + if (!m68k_feature(env, M68K_FEATURE_UNALIGNED_DATA)) { + sp &= ~1; + } + if (cs->exception_index == EXCP_ACCESS) { if (env->mmu.fault) { cpu_abort(cs, "DOUBLE MMU FAULT\n"); @@ -468,7 +471,17 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, if (m68k_feature(env, M68K_FEATURE_M68040)) { env->mmu.mmusr = 0; - env->mmu.ssw |= M68K_ATC_040; + + /* + * According to the MC68040 users manual the ATC bit of the SSW is + * used to distinguish between ATC faults and physical bus errors. + * In the case of a bus error e.g. during nubus read from an empty + * slot this bit should not be set + */ + if (response != MEMTX_DECODE_ERROR) { + env->mmu.ssw |= M68K_ATC_040; + } + /* FIXME: manage MMU table access error */ env->mmu.ssw &= ~M68K_TM_040; if (env->sr & SR_S) { /* SUPERVISOR */ |