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author | Richard Henderson <richard.henderson@linaro.org> | 2022-06-02 06:30:24 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2022-06-02 06:30:24 -0700 |
commit | 1e62a82574fc28e64deca589a23cf55ada2e1a7d (patch) | |
tree | ebad6eeb763631e6fd846e2a5dd54bcb415b1eec /target/m68k/helper.h | |
parent | e2c2d575991cbccc39da81f1b54e78523a24ed11 (diff) | |
parent | 36a0ab595f4e24b987e67faa52d4b174f67144b6 (diff) | |
download | qemu-1e62a82574fc28e64deca589a23cf55ada2e1a7d.zip qemu-1e62a82574fc28e64deca589a23cf55ada2e1a7d.tar.gz qemu-1e62a82574fc28e64deca589a23cf55ada2e1a7d.tar.bz2 |
Merge tag 'm68k-for-7.1-pull-request' of https://github.com/vivier/qemu-m68k into staging
m68k pull request 20220602
- Fixes and cleanup
- Implement TRAP opcodes
- Enable halt on 68060
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# gpg: Signature made Thu 02 Jun 2022 04:58:28 AM PDT
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [undefined]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [undefined]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* tag 'm68k-for-7.1-pull-request' of https://github.com/vivier/qemu-m68k:
target/m68k: Mark helper_raise_exception as noreturn
linux-user/strace: Adjust get_thread_area for m68k
linux-user/strace: Use is_error in print_syscall_err
tests/tcg/m68k: Add trap.c
target/m68k: Implement FTRAPcc
target/m68k: Implement TRAPV
target/m68k: Implement TPF in terms of TRAPcc
target/m68k: Implement TRAPcc
target/m68k: Fix stack frame for EXCP_ILLEGAL
target/m68k: Fix address argument for EXCP_TRACE
target/m68k: Fix pc, c flag, and address argument for EXCP_DIV0
target/m68k: Fix address argument for EXCP_CHK
target/m68k: Remove retaddr in m68k_interrupt_all
linux-user/m68k: Handle EXCP_TRAP1 through EXCP_TRAP15
target/m68k: Fix coding style in m68k_interrupt_all
target/m68k: Switch over exception type in m68k_interrupt_all
target/m68k: Raise the TRAPn exception with the correct pc
target/m68k: Enable halt insn for 68060
target/m68k: Clear mach in m68k_cpu_disas_set_info
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/m68k/helper.h')
-rw-r--r-- | target/m68k/helper.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 0a6b414..c9bed2b 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -1,12 +1,12 @@ DEF_HELPER_1(bitrev, i32, i32) DEF_HELPER_1(ff1, i32, i32) DEF_HELPER_FLAGS_2(sats, TCG_CALL_NO_RWG_SE, i32, i32, i32) -DEF_HELPER_3(divuw, void, env, int, i32) -DEF_HELPER_3(divsw, void, env, int, s32) -DEF_HELPER_4(divul, void, env, int, int, i32) -DEF_HELPER_4(divsl, void, env, int, int, s32) -DEF_HELPER_4(divull, void, env, int, int, i32) -DEF_HELPER_4(divsll, void, env, int, int, s32) +DEF_HELPER_4(divuw, void, env, int, i32, int) +DEF_HELPER_4(divsw, void, env, int, s32, int) +DEF_HELPER_5(divul, void, env, int, int, i32, int) +DEF_HELPER_5(divsl, void, env, int, int, s32, int) +DEF_HELPER_5(divull, void, env, int, int, i32, int) +DEF_HELPER_5(divsll, void, env, int, int, s32, int) DEF_HELPER_2(set_sr, void, env, i32) DEF_HELPER_3(cf_movec_to, void, env, i32, i32) DEF_HELPER_3(m68k_movec_to, void, env, i32, i32) @@ -109,7 +109,7 @@ DEF_HELPER_3(set_mac_extu, void, env, i32, i32) DEF_HELPER_2(flush_flags, void, env, i32) DEF_HELPER_2(set_ccr, void, env, i32) DEF_HELPER_FLAGS_1(get_ccr, TCG_CALL_NO_WG_SE, i32, env) -DEF_HELPER_2(raise_exception, void, env, i32) +DEF_HELPER_2(raise_exception, noreturn, env, i32) DEF_HELPER_FLAGS_3(bfffo_reg, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32) |