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| author | Song Gao <gaosong@loongson.cn> | 2023-09-14 10:25:52 +0800 |
|---|---|---|
| committer | Song Gao <gaosong@loongson.cn> | 2023-09-20 11:43:10 +0800 |
| commit | eb48ab2256531261c5aa9e9d26b020cceab1e111 (patch) | |
| tree | 6fa3ebbcbf884e4ecb0c93c6c1ea197df71af5a9 /target/loongarch | |
| parent | e2600dad02fa703a714781bd74bc2aabe11bf88d (diff) | |
| download | qemu-eb48ab2256531261c5aa9e9d26b020cceab1e111.zip qemu-eb48ab2256531261c5aa9e9d26b020cceab1e111.tar.gz qemu-eb48ab2256531261c5aa9e9d26b020cceab1e111.tar.bz2 | |
target/loongarch: Use gen_helper_gvec_4 for 4OP vector instructions
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-5-gaosong@loongson.cn>
Diffstat (limited to 'target/loongarch')
| -rw-r--r-- | target/loongarch/helper.h | 2 | ||||
| -rw-r--r-- | target/loongarch/insn_trans/trans_vec.c.inc | 22 | ||||
| -rw-r--r-- | target/loongarch/vec_helper.c | 11 |
3 files changed, 19 insertions, 16 deletions
diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h index ead1656..727ccfb 100644 --- a/target/loongarch/helper.h +++ b/target/loongarch/helper.h @@ -682,7 +682,7 @@ DEF_HELPER_4(vilvh_h, void, env, i32, i32, i32) DEF_HELPER_4(vilvh_w, void, env, i32, i32, i32) DEF_HELPER_4(vilvh_d, void, env, i32, i32, i32) -DEF_HELPER_5(vshuf_b, void, env, i32, i32, i32, i32) +DEF_HELPER_FLAGS_5(vshuf_b, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32) DEF_HELPER_4(vshuf_h, void, env, i32, i32, i32) DEF_HELPER_4(vshuf_w, void, env, i32, i32, i32) DEF_HELPER_4(vshuf_d, void, env, i32, i32, i32) diff --git a/target/loongarch/insn_trans/trans_vec.c.inc b/target/loongarch/insn_trans/trans_vec.c.inc index 6a51852..71b1b5e 100644 --- a/target/loongarch/insn_trans/trans_vec.c.inc +++ b/target/loongarch/insn_trans/trans_vec.c.inc @@ -34,18 +34,22 @@ static bool gen_vvvv_ptr(DisasContext *ctx, arg_vvvv *a, return gen_vvvv_ptr_vl(ctx, a, 16, fn); } -static bool gen_vvvv(DisasContext *ctx, arg_vvvv *a, - void (*func)(TCGv_ptr, TCGv_i32, TCGv_i32, - TCGv_i32, TCGv_i32)) +static bool gen_vvvv_vl(DisasContext *ctx, arg_vvvv *a, uint32_t oprsz, + gen_helper_gvec_4 *fn) { - TCGv_i32 vd = tcg_constant_i32(a->vd); - TCGv_i32 vj = tcg_constant_i32(a->vj); - TCGv_i32 vk = tcg_constant_i32(a->vk); - TCGv_i32 va = tcg_constant_i32(a->va); + tcg_gen_gvec_4_ool(vec_full_offset(a->vd), + vec_full_offset(a->vj), + vec_full_offset(a->vk), + vec_full_offset(a->va), + oprsz, ctx->vl / 8, 0, fn); + return true; +} +static bool gen_vvvv(DisasContext *ctx, arg_vvvv *a, + gen_helper_gvec_4 *fn) +{ CHECK_SXE; - func(cpu_env, vd, vj, vk, va); - return true; + return gen_vvvv_vl(ctx, a, 16, fn); } static bool gen_vvv(DisasContext *ctx, arg_vvv *a, diff --git a/target/loongarch/vec_helper.c b/target/loongarch/vec_helper.c index 3a7a620..7078c4c 100644 --- a/target/loongarch/vec_helper.c +++ b/target/loongarch/vec_helper.c @@ -2899,15 +2899,14 @@ VILVH(vilvh_h, 32, H) VILVH(vilvh_w, 64, W) VILVH(vilvh_d, 128, D) -void HELPER(vshuf_b)(CPULoongArchState *env, - uint32_t vd, uint32_t vj, uint32_t vk, uint32_t va) +void HELPER(vshuf_b)(void *vd, void *vj, void *vk, void *va, uint32_t desc) { int i, m; VReg temp; - VReg *Vd = &(env->fpr[vd].vreg); - VReg *Vj = &(env->fpr[vj].vreg); - VReg *Vk = &(env->fpr[vk].vreg); - VReg *Va = &(env->fpr[va].vreg); + VReg *Vd = (VReg *)vd; + VReg *Vj = (VReg *)vj; + VReg *Vk = (VReg *)vk; + VReg *Va = (VReg *)va; m = LSX_LEN/8; for (i = 0; i < m ; i++) { |