diff options
| author | Song Gao <gaosong@loongson.cn> | 2023-08-22 09:22:19 +0200 |
|---|---|---|
| committer | Song Gao <gaosong@loongson.cn> | 2023-08-24 11:17:58 +0800 |
| commit | a380c6f11fd9f1ca96f204c4ae26c79e483ede8a (patch) | |
| tree | 9b1401660bf89a0b1df790c0519cd380d332cf36 /target/loongarch | |
| parent | ebf288b410a38316dd6d6d15a9453222fff13d92 (diff) | |
| download | qemu-a380c6f11fd9f1ca96f204c4ae26c79e483ede8a.zip qemu-a380c6f11fd9f1ca96f204c4ae26c79e483ede8a.tar.gz qemu-a380c6f11fd9f1ca96f204c4ae26c79e483ede8a.tar.bz2 | |
target/loongarch: Add avail_IOCSR to check iocsr instructions
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20230822032724.1353391-16-gaosong@loongson.cn>
Message-Id: <20230822072219.35719-1-philmd@linaro.org>
Diffstat (limited to 'target/loongarch')
| -rw-r--r-- | target/loongarch/insn_trans/trans_privileged.c.inc | 16 | ||||
| -rw-r--r-- | target/loongarch/translate.h | 2 |
2 files changed, 9 insertions, 9 deletions
diff --git a/target/loongarch/insn_trans/trans_privileged.c.inc b/target/loongarch/insn_trans/trans_privileged.c.inc index 099cd87..4cb701b 100644 --- a/target/loongarch/insn_trans/trans_privileged.c.inc +++ b/target/loongarch/insn_trans/trans_privileged.c.inc @@ -312,14 +312,14 @@ static bool gen_iocsrwr(DisasContext *ctx, arg_rr *a, return true; } -TRANS(iocsrrd_b, ALL, gen_iocsrrd, gen_helper_iocsrrd_b) -TRANS(iocsrrd_h, ALL, gen_iocsrrd, gen_helper_iocsrrd_h) -TRANS(iocsrrd_w, ALL, gen_iocsrrd, gen_helper_iocsrrd_w) -TRANS(iocsrrd_d, ALL, gen_iocsrrd, gen_helper_iocsrrd_d) -TRANS(iocsrwr_b, ALL, gen_iocsrwr, gen_helper_iocsrwr_b) -TRANS(iocsrwr_h, ALL, gen_iocsrwr, gen_helper_iocsrwr_h) -TRANS(iocsrwr_w, ALL, gen_iocsrwr, gen_helper_iocsrwr_w) -TRANS(iocsrwr_d, ALL, gen_iocsrwr, gen_helper_iocsrwr_d) +TRANS(iocsrrd_b, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_b) +TRANS(iocsrrd_h, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_h) +TRANS(iocsrrd_w, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_w) +TRANS(iocsrrd_d, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_d) +TRANS(iocsrwr_b, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_b) +TRANS(iocsrwr_h, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_h) +TRANS(iocsrwr_w, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_w) +TRANS(iocsrwr_d, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_d) static void check_mmu_idx(DisasContext *ctx) { diff --git a/target/loongarch/translate.h b/target/loongarch/translate.h index db46e9a..89b49a8 100644 --- a/target/loongarch/translate.h +++ b/target/loongarch/translate.h @@ -23,7 +23,7 @@ #define avail_LSPW(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LSPW)) #define avail_LAM(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LAM)) #define avail_LSX(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LSX)) - +#define avail_IOCSR(C) (FIELD_EX32((C)->cpucfg1, CPUCFG1, IOCSR)) /* * If an operation is being performed on less than TARGET_LONG_BITS, |