aboutsummaryrefslogtreecommitdiff
path: root/target/loongarch/insn_trans
diff options
context:
space:
mode:
authorRichard Henderson <richard.henderson@linaro.org>2023-01-17 14:32:38 -1000
committerRichard Henderson <richard.henderson@linaro.org>2023-01-23 15:36:36 -1000
commitc2b618a8c1acb899b56eb8b2f1354da1f69474ea (patch)
tree077daae3e46badd879aa3748eda529191a0f51f5 /target/loongarch/insn_trans
parent2e0d91513deb9bf0e5a1b2e0f574d999df3ebd99 (diff)
downloadqemu-c2b618a8c1acb899b56eb8b2f1354da1f69474ea.zip
qemu-c2b618a8c1acb899b56eb8b2f1354da1f69474ea.tar.gz
qemu-c2b618a8c1acb899b56eb8b2f1354da1f69474ea.tar.bz2
target/loongarch: Disassemble jirl properly
While jirl shares the same instruction format as bne etc, it is not assembled the same. In particular, rd is printed first not second and the immediate is not pc-relative. Decode into the arg_rr_i structure, which prints correctly. This changes the "offs" member to "imm", to update translate. Reviewed-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/loongarch/insn_trans')
-rw-r--r--target/loongarch/insn_trans/trans_branch.c.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/loongarch/insn_trans/trans_branch.c.inc b/target/loongarch/insn_trans/trans_branch.c.inc
index 65dbdff..a860f7e 100644
--- a/target/loongarch/insn_trans/trans_branch.c.inc
+++ b/target/loongarch/insn_trans/trans_branch.c.inc
@@ -23,7 +23,7 @@ static bool trans_jirl(DisasContext *ctx, arg_jirl *a)
TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
- tcg_gen_addi_tl(cpu_pc, src1, a->offs);
+ tcg_gen_addi_tl(cpu_pc, src1, a->imm);
tcg_gen_movi_tl(dest, ctx->base.pc_next + 4);
gen_set_gpr(a->rd, dest, EXT_NONE);
tcg_gen_lookup_and_goto_ptr();