diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2023-02-25 13:24:35 -1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-03-05 13:45:31 -0800 |
| commit | 3e7da311d75c4fb8e7fd9b68e95508b052587e75 (patch) | |
| tree | bfbf4d2a7ee74b7c68e0121b517a366783b78339 /target/i386 | |
| parent | 3b10fd8f09185b389ecbe56d2b246bb10248d76d (diff) | |
| download | qemu-3e7da311d75c4fb8e7fd9b68e95508b052587e75.zip qemu-3e7da311d75c4fb8e7fd9b68e95508b052587e75.tar.gz qemu-3e7da311d75c4fb8e7fd9b68e95508b052587e75.tar.bz2 | |
target/i386: Simplify POPF
Compute the eflags write mask separately, leaving one call
to the helper. Use tcg_constant_i32.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/i386')
| -rw-r--r-- | target/i386/tcg/translate.c | 55 |
1 files changed, 11 insertions, 44 deletions
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 2f38426..fa422eb 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -5226,52 +5226,19 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) case 0x9d: /* popf */ gen_svm_check_intercept(s, SVM_EXIT_POPF); if (check_vm86_iopl(s)) { - ot = gen_pop_T0(s); + int mask = TF_MASK | AC_MASK | ID_MASK | NT_MASK; + if (CPL(s) == 0) { - if (dflag != MO_16) { - gen_helper_write_eflags(cpu_env, s->T0, - tcg_const_i32((TF_MASK | AC_MASK | - ID_MASK | NT_MASK | - IF_MASK | - IOPL_MASK))); - } else { - gen_helper_write_eflags(cpu_env, s->T0, - tcg_const_i32((TF_MASK | AC_MASK | - ID_MASK | NT_MASK | - IF_MASK | IOPL_MASK) - & 0xffff)); - } - } else { - if (CPL(s) <= IOPL(s)) { - if (dflag != MO_16) { - gen_helper_write_eflags(cpu_env, s->T0, - tcg_const_i32((TF_MASK | - AC_MASK | - ID_MASK | - NT_MASK | - IF_MASK))); - } else { - gen_helper_write_eflags(cpu_env, s->T0, - tcg_const_i32((TF_MASK | - AC_MASK | - ID_MASK | - NT_MASK | - IF_MASK) - & 0xffff)); - } - } else { - if (dflag != MO_16) { - gen_helper_write_eflags(cpu_env, s->T0, - tcg_const_i32((TF_MASK | AC_MASK | - ID_MASK | NT_MASK))); - } else { - gen_helper_write_eflags(cpu_env, s->T0, - tcg_const_i32((TF_MASK | AC_MASK | - ID_MASK | NT_MASK) - & 0xffff)); - } - } + mask |= IF_MASK | IOPL_MASK; + } else if (CPL(s) <= IOPL(s)) { + mask |= IF_MASK; } + if (dflag == MO_16) { + mask &= 0xffff; + } + + ot = gen_pop_T0(s); + gen_helper_write_eflags(cpu_env, s->T0, tcg_constant_i32(mask)); gen_pop_update(s, ot); set_cc_op(s, CC_OP_EFLAGS); /* abort translation because TF/AC flag may change */ |