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author | Paolo Bonzini <pbonzini@redhat.com> | 2022-09-01 09:04:17 +0200 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-10-18 13:58:04 +0200 |
commit | b98f886c8f8661773047197d132efec97810b37a (patch) | |
tree | 7422757b374f3b618c90f5b7a58793664312c6c6 /target/i386/tcg | |
parent | 6e0cac782ab121ab5a330644c4c38011c53de30f (diff) | |
download | qemu-b98f886c8f8661773047197d132efec97810b37a.zip qemu-b98f886c8f8661773047197d132efec97810b37a.tar.gz qemu-b98f886c8f8661773047197d132efec97810b37a.tar.bz2 |
target/i386: Introduce 256-bit vector helpers
The new implementation of SSE will cover AVX from the get go, because
all the work for the helper functions is already done. We just need to
build them.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/tcg')
-rw-r--r-- | target/i386/tcg/fpu_helper.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index 9b59026..5f3f7a1 100644 --- a/target/i386/tcg/fpu_helper.c +++ b/target/i386/tcg/fpu_helper.c @@ -3065,3 +3065,6 @@ void helper_movq(CPUX86State *env, void *d, void *s) #define SHIFT 1 #include "ops_sse.h" + +#define SHIFT 2 +#include "ops_sse.h" |