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authorDr. David Alan Gilbert <dgilbert@redhat.com>2017-09-25 12:29:12 +0100
committerDr. David Alan Gilbert <dgilbert@redhat.com>2017-09-27 11:35:59 +0100
commit44b1ff319c4781c7ab13f7e119b3114a1e6a52e2 (patch)
treeb8e8aa9c74c890808876e7a5969b69ac25c1930a /target/i386/machine.c
parent9ac78b6171bec47083a9b6ce88dc1f114caea2f9 (diff)
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migration: pre_save return int
Modify the pre_save method on VMStateDescription to return an int rather than void so that it potentially can fail. Changed zillions of devices to make them return 0; the only case I've made it return non-0 is hw/intc/s390_flic_kvm.c that already had an error_report/return case. Note: If you add an error exit in your pre_save you must emit an error_report to say why. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20170925112917.21340-2-dgilbert@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Diffstat (limited to 'target/i386/machine.c')
-rw-r--r--target/i386/machine.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/target/i386/machine.c b/target/i386/machine.c
index 29cc58e..df5ec35 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -160,13 +160,15 @@ static floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper)
return temp.d;
}
-static void fpreg_pre_save(void *opaque)
+static int fpreg_pre_save(void *opaque)
{
x86_FPReg_tmp *tmp = opaque;
/* we save the real CPU data (in case of MMX usage only 'mant'
contains the MMX register */
cpu_get_fp80(&tmp->tmp_mant, &tmp->tmp_exp, tmp->parent->d);
+
+ return 0;
}
static int fpreg_post_load(void *opaque, int version)
@@ -196,7 +198,7 @@ static const VMStateDescription vmstate_fpreg = {
}
};
-static void cpu_pre_save(void *opaque)
+static int cpu_pre_save(void *opaque)
{
X86CPU *cpu = opaque;
CPUX86State *env = &cpu->env;
@@ -228,6 +230,7 @@ static void cpu_pre_save(void *opaque)
env->segs[R_SS].flags &= ~(env->segs[R_SS].flags & DESC_DPL_MASK);
}
+ return 0;
}
static int cpu_post_load(void *opaque, int version_id)