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| author | Paolo Bonzini <pbonzini@redhat.com> | 2019-10-16 10:18:10 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2019-10-26 15:38:07 +0200 |
| commit | 6f529b7534c534afe2f2b834199191d8b4cc07ca (patch) | |
| tree | 8f4bcd4423309a16ccebc628f13e4228f6ab2e0b /target/i386/fpu_helper.c | |
| parent | 038adc2f5850e32019bda06c559d0301be436eae (diff) | |
| download | qemu-6f529b7534c534afe2f2b834199191d8b4cc07ca.zip qemu-6f529b7534c534afe2f2b834199191d8b4cc07ca.tar.gz qemu-6f529b7534c534afe2f2b834199191d8b4cc07ca.tar.bz2 | |
target/i386: move FERR handling to target/i386
Move it out of pc.c since it is strictly tied to TCG. This is
almost exclusively code movement, the next patch will implement
IGNNE.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/fpu_helper.c')
| -rw-r--r-- | target/i386/fpu_helper.c | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c index 005f1f6..4db0059 100644 --- a/target/i386/fpu_helper.c +++ b/target/i386/fpu_helper.c @@ -26,6 +26,10 @@ #include "exec/cpu_ldst.h" #include "fpu/softfloat.h" +#ifdef CONFIG_SOFTMMU +#include "hw/irq.h" +#endif + #define FPU_RC_MASK 0xc00 #define FPU_RC_NEAR 0x000 #define FPU_RC_DOWN 0x400 @@ -58,6 +62,26 @@ #define floatx80_l2e make_floatx80(0x3fff, 0xb8aa3b295c17f0bcLL) #define floatx80_l2t make_floatx80(0x4000, 0xd49a784bcd1b8afeLL) +#if !defined(CONFIG_USER_ONLY) +static qemu_irq ferr_irq; + +void x86_register_ferr_irq(qemu_irq irq) +{ + ferr_irq = irq; +} + +void cpu_clear_ferr(void) +{ + qemu_irq_lower(ferr_irq); +} + +static void cpu_set_ferr(void) +{ + qemu_irq_raise(ferr_irq); +} +#endif + + static inline void fpush(CPUX86State *env) { env->fpstt = (env->fpstt - 1) & 7; @@ -137,7 +161,7 @@ static void fpu_raise_exception(CPUX86State *env, uintptr_t retaddr) } #if !defined(CONFIG_USER_ONLY) else { - cpu_set_ferr(env); + cpu_set_ferr(); } #endif } |