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| author | Robert Hoo <robert.hu@linux.intel.com> | 2018-07-05 17:09:57 +0800 |
|---|---|---|
| committer | Eduardo Habkost <ehabkost@redhat.com> | 2018-08-16 13:43:01 -0300 |
| commit | 59a80a19ca31a6fff9fdbb6b4cf55a5a0767c3bc (patch) | |
| tree | 002704ceb635a9da53ad90b05603382ad1446011 /target/i386/cpu.h | |
| parent | 5131dc433df54b37e8e918d8fba7fe10344e7a7b (diff) | |
| download | qemu-59a80a19ca31a6fff9fdbb6b4cf55a5a0767c3bc.zip qemu-59a80a19ca31a6fff9fdbb6b4cf55a5a0767c3bc.tar.gz qemu-59a80a19ca31a6fff9fdbb6b4cf55a5a0767c3bc.tar.bz2 | |
i386: Add CPUID bit for WBNOINVD
WBNOINVD: Write back and do not invalidate cache, enumerated by
CPUID.(EAX=80000008H, ECX=0):EBX[bit 9].
Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
Message-Id: <1530781798-183214-5-git-send-email-robert.hu@linux.intel.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'target/i386/cpu.h')
| -rw-r--r-- | target/i386/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 4a95c63..9cad581 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -694,6 +694,8 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_7_0_EDX_ARCH_CAPABILITIES (1U << 29) /*Arch Capabilities*/ #define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypass Disable */ +#define CPUID_8000_0008_EBX_WBNOINVD (1U << 9) /* Write back and + do not invalidate cache */ #define CPUID_8000_0008_EBX_IBPB (1U << 12) /* Indirect Branch Prediction Barrier */ #define CPUID_XSAVE_XSAVEOPT (1U << 0) |