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| author | Liran Alon <liran.alon@oracle.com> | 2019-06-19 19:21:35 +0300 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2019-06-21 13:23:44 +0200 |
| commit | 18ab37ba1cee290923240744288dbee8be9355fb (patch) | |
| tree | 428d2947719dd27983a242a3b665b5dd5eb451ee /target/i386/cpu.h | |
| parent | bceeeef9e7544057659118688243260c390eceb9 (diff) | |
| download | qemu-18ab37ba1cee290923240744288dbee8be9355fb.zip qemu-18ab37ba1cee290923240744288dbee8be9355fb.tar.gz qemu-18ab37ba1cee290923240744288dbee8be9355fb.tar.bz2 | |
target/i386: kvm: Block migration for vCPUs exposed with nested virtualization
Commit d98f26073beb ("target/i386: kvm: add VMX migration blocker")
added a migration blocker for vCPU exposed with Intel VMX.
However, migration should also be blocked for vCPU exposed with
AMD SVM.
Both cases should be blocked because QEMU should extract additional
vCPU state from KVM that should be migrated as part of vCPU VMState.
E.g. Whether vCPU is running in guest-mode or host-mode.
Fixes: d98f26073beb ("target/i386: kvm: add VMX migration blocker")
Reviewed-by: Maran Wilson <maran.wilson@oracle.com>
Signed-off-by: Liran Alon <liran.alon@oracle.com>
Message-Id: <20190619162140.133674-6-liran.alon@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/cpu.h')
| -rw-r--r-- | target/i386/cpu.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 7f48136..bf0c9c2 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -722,6 +722,13 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_VENDOR_HYGON "HygonGenuine" +#define IS_INTEL_CPU(env) ((env)->cpuid_vendor1 == CPUID_VENDOR_INTEL_1 && \ + (env)->cpuid_vendor2 == CPUID_VENDOR_INTEL_2 && \ + (env)->cpuid_vendor3 == CPUID_VENDOR_INTEL_3) +#define IS_AMD_CPU(env) ((env)->cpuid_vendor1 == CPUID_VENDOR_AMD_1 && \ + (env)->cpuid_vendor2 == CPUID_VENDOR_AMD_2 && \ + (env)->cpuid_vendor3 == CPUID_VENDOR_AMD_3) + #define CPUID_MWAIT_IBE (1U << 1) /* Interrupts can exit capability */ #define CPUID_MWAIT_EMX (1U << 0) /* enumeration supported */ @@ -1848,6 +1855,11 @@ static inline int32_t x86_get_a20_mask(CPUX86State *env) } } +static inline bool cpu_has_vmx(CPUX86State *env) +{ + return env->features[FEAT_1_ECX] & CPUID_EXT_VMX; +} + /* fpu_helper.c */ void update_fp_status(CPUX86State *env); void update_mxcsr_status(CPUX86State *env); |