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| author | Paul Brook <paul@nowt.org> | 2022-04-24 23:01:25 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-10-18 13:58:04 +0200 |
| commit | 608db8dbfb80d43ec3a29626a805e39cc4934988 (patch) | |
| tree | a8fd6df0292a683e11a0c49108c6fe3e856d465c /target/i386/cpu.h | |
| parent | caa01fadbef15f0e2a5ac7bfc7372a4b4244687f (diff) | |
| download | qemu-608db8dbfb80d43ec3a29626a805e39cc4934988.zip qemu-608db8dbfb80d43ec3a29626a805e39cc4934988.tar.gz qemu-608db8dbfb80d43ec3a29626a805e39cc4934988.tar.bz2 | |
target/i386: add AVX_EN hflag
Add a new hflag bit to determine whether AVX instructions are allowed
Signed-off-by: Paul Brook <paul@nowt.org>
Message-Id: <20220424220204.2493824-4-paul@nowt.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/cpu.h')
| -rw-r--r-- | target/i386/cpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 5be90e7..dad2b2d 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -169,6 +169,7 @@ typedef enum X86Seg { #define HF_MPX_EN_SHIFT 25 /* MPX Enabled (CR4+XCR0+BNDCFGx) */ #define HF_MPX_IU_SHIFT 26 /* BND registers in-use */ #define HF_UMIP_SHIFT 27 /* CR4.UMIP */ +#define HF_AVX_EN_SHIFT 28 /* AVX Enabled (CR4+XCR0) */ #define HF_CPL_MASK (3 << HF_CPL_SHIFT) #define HF_INHIBIT_IRQ_MASK (1 << HF_INHIBIT_IRQ_SHIFT) @@ -195,6 +196,7 @@ typedef enum X86Seg { #define HF_MPX_EN_MASK (1 << HF_MPX_EN_SHIFT) #define HF_MPX_IU_MASK (1 << HF_MPX_IU_SHIFT) #define HF_UMIP_MASK (1 << HF_UMIP_SHIFT) +#define HF_AVX_EN_MASK (1 << HF_AVX_EN_SHIFT) /* hflags2 */ @@ -2126,6 +2128,7 @@ void host_cpuid(uint32_t function, uint32_t count, /* helper.c */ void x86_cpu_set_a20(X86CPU *cpu, int a20_state); +void cpu_sync_avx_hflag(CPUX86State *env); #ifndef CONFIG_USER_ONLY static inline int x86_asidx_from_attrs(CPUState *cs, MemTxAttrs attrs) |