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| author | Richard Henderson <richard.henderson@linaro.org> | 2017-12-28 17:36:45 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2018-01-30 10:22:26 -0800 |
| commit | 4f5f254808e1e317b407275724df7794a270c5c1 (patch) | |
| tree | 94c42a5cfc575a8fd47d45e07447f9600d7c3c0b /target/hppa/translate.c | |
| parent | 650cdb2a2e4936fb66c13793278f4bacf0e5a6f7 (diff) | |
| download | qemu-4f5f254808e1e317b407275724df7794a270c5c1.zip qemu-4f5f254808e1e317b407275724df7794a270c5c1.tar.gz qemu-4f5f254808e1e317b407275724df7794a270c5c1.tar.bz2 | |
target/hppa: Implement external interrupts
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hppa/translate.c')
| -rw-r--r-- | target/hppa/translate.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 44abc90..d6c65f3 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2124,12 +2124,25 @@ static DisasJumpType trans_mtctl(DisasContext *ctx, uint32_t insn, /* All other control registers are privileged or read-only. */ CHECK_MOST_PRIVILEGED(EXCP_PRIV_REG); +#ifdef CONFIG_USER_ONLY + g_assert_not_reached(); +#else + DisasJumpType ret = DISAS_NEXT; + nullify_over(ctx); switch (ctl) { case CR_IT: /* ??? modify interval timer offset */ break; + case CR_EIRR: + gen_helper_write_eirr(cpu_env, reg); + break; + case CR_EIEM: + gen_helper_write_eiem(cpu_env, reg); + ret = DISAS_IAQ_N_STALE_EXIT; + break; + case CR_IIASQ: case CR_IIAOQ: /* FIXME: Respect PSW_Q bit */ @@ -2146,7 +2159,8 @@ static DisasJumpType trans_mtctl(DisasContext *ctx, uint32_t insn, tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); break; } - return nullify_end(ctx, DISAS_NEXT); + return nullify_end(ctx, ret); +#endif } static DisasJumpType trans_mtsarcm(DisasContext *ctx, uint32_t insn, |