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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-09-16 21:41:32 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-11-06 18:49:34 -0800 |
| commit | 84e224d4226001ed73b8da42e4ad155cf80b1eef (patch) | |
| tree | 14fe28b2916545105109baacaaaa71261c97db9f /target/hppa/insns.decode | |
| parent | 63c427c615ea927fd93901f2dfeebb62ad3bf2bc (diff) | |
| download | qemu-84e224d4226001ed73b8da42e4ad155cf80b1eef.zip qemu-84e224d4226001ed73b8da42e4ad155cf80b1eef.tar.gz qemu-84e224d4226001ed73b8da42e4ad155cf80b1eef.tar.bz2 | |
target/hppa: Decode d for bb instructions
Manipulate the shift count so that the bit to be tested
is always placed at the MSB.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hppa/insns.decode')
| -rw-r--r-- | target/hppa/insns.decode | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index ad454ad..b185523 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -290,8 +290,8 @@ fmpysub_d 100110 ..... ..... ..... ..... 1 ..... @mpyadd # Conditional Branches #### -bb_sar 110000 00000 r:5 c:1 10 ........... n:1 . disp=%assemble_12 -bb_imm 110001 p:5 r:5 c:1 10 ........... n:1 . disp=%assemble_12 +bb_sar 110000 00000 r:5 c:1 1 d:1 ........... n:1 . disp=%assemble_12 +bb_imm 110001 p:5 r:5 c:1 1 d:1 ........... n:1 . disp=%assemble_12 movb 110010 ..... ..... ... ........... . . @rrb_cf f=0 movbi 110011 ..... ..... ... ........... . . @rib_cf f=0 |