diff options
author | Taylor Simpson <tsimpson@quicinc.com> | 2021-02-07 23:46:15 -0600 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2021-02-18 07:48:22 -0800 |
commit | 471d4b2dc6b84332a051814ba2b7ff6997ba9673 (patch) | |
tree | 514b365442bbe884130fc1a7481f13a2fcbdbac1 /target/hexagon | |
parent | a646e99cb90b370e983685146782f9d99dc6b7e0 (diff) | |
download | qemu-471d4b2dc6b84332a051814ba2b7ff6997ba9673.zip qemu-471d4b2dc6b84332a051814ba2b7ff6997ba9673.tar.gz qemu-471d4b2dc6b84332a051814ba2b7ff6997ba9673.tar.bz2 |
Hexagon (target/hexagon) instruction classes
Determine legal VLIW slots for each instruction
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1612763186-18161-26-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hexagon')
-rw-r--r-- | target/hexagon/iclass.c | 73 | ||||
-rw-r--r-- | target/hexagon/iclass.h | 50 | ||||
-rw-r--r-- | target/hexagon/imported/iclass.def | 51 |
3 files changed, 174 insertions, 0 deletions
diff --git a/target/hexagon/iclass.c b/target/hexagon/iclass.c new file mode 100644 index 0000000..378d8a6 --- /dev/null +++ b/target/hexagon/iclass.c @@ -0,0 +1,73 @@ +/* + * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +#include "qemu/osdep.h" +#include "iclass.h" + +static const SlotMask iclass_info[] = { + +#define DEF_PP_ICLASS32(TYPE, SLOTS, UNITS) \ + [ICLASS_FROM_TYPE(TYPE)] = SLOTS_##SLOTS, +#define DEF_EE_ICLASS32(TYPE, SLOTS, UNITS) \ + [ICLASS_FROM_TYPE(TYPE)] = SLOTS_##SLOTS, +#include "imported/iclass.def" +#undef DEF_PP_ICLASS32 +#undef DEF_EE_ICLASS32 +}; + +SlotMask find_iclass_slots(Opcode opcode, int itype) +{ + /* There are some exceptions to what the iclass dictates */ + if (GET_ATTRIB(opcode, A_ICOP)) { + return SLOTS_2; + } else if (GET_ATTRIB(opcode, A_RESTRICT_SLOT0ONLY)) { + return SLOTS_0; + } else if (GET_ATTRIB(opcode, A_RESTRICT_SLOT1ONLY)) { + return SLOTS_1; + } else if (GET_ATTRIB(opcode, A_RESTRICT_SLOT2ONLY)) { + return SLOTS_2; + } else if (GET_ATTRIB(opcode, A_RESTRICT_SLOT3ONLY)) { + return SLOTS_3; + } else if (GET_ATTRIB(opcode, A_COF) && + GET_ATTRIB(opcode, A_INDIRECT) && + !GET_ATTRIB(opcode, A_MEMLIKE) && + !GET_ATTRIB(opcode, A_MEMLIKE_PACKET_RULES)) { + return SLOTS_2; + } else if (GET_ATTRIB(opcode, A_RESTRICT_NOSLOT1)) { + return SLOTS_0; + } else if ((opcode == J2_trap0) || + (opcode == Y2_isync) || + (opcode == J2_pause) || (opcode == J4_hintjumpr)) { + return SLOTS_2; + } else if ((itype == ICLASS_V2LDST) && (GET_ATTRIB(opcode, A_STORE))) { + return SLOTS_01; + } else if ((itype == ICLASS_V2LDST) && (!GET_ATTRIB(opcode, A_STORE))) { + return SLOTS_01; + } else if (GET_ATTRIB(opcode, A_CRSLOT23)) { + return SLOTS_23; + } else if (GET_ATTRIB(opcode, A_RESTRICT_PREFERSLOT0)) { + return SLOTS_0; + } else if (GET_ATTRIB(opcode, A_SUBINSN)) { + return SLOTS_01; + } else if (GET_ATTRIB(opcode, A_CALL)) { + return SLOTS_23; + } else if ((opcode == J4_jumpseti) || (opcode == J4_jumpsetr)) { + return SLOTS_23; + } else { + return iclass_info[itype]; + } +} diff --git a/target/hexagon/iclass.h b/target/hexagon/iclass.h new file mode 100644 index 0000000..78d3726 --- /dev/null +++ b/target/hexagon/iclass.h @@ -0,0 +1,50 @@ +/* + * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef HEXAGON_ICLASS_H +#define HEXAGON_ICLASS_H + +#include "attribs.h" + +#define ICLASS_FROM_TYPE(TYPE) ICLASS_##TYPE + +enum { + +#define DEF_PP_ICLASS32(TYPE, SLOTS, UNITS) ICLASS_FROM_TYPE(TYPE), +#define DEF_EE_ICLASS32(TYPE, SLOTS, UNITS) ICLASS_FROM_TYPE(TYPE), +#include "imported/iclass.def" +#undef DEF_PP_ICLASS32 +#undef DEF_EE_ICLASS32 + + ICLASS_FROM_TYPE(COPROC_VX), + ICLASS_FROM_TYPE(COPROC_VMEM), + NUM_ICLASSES +}; + +typedef enum { + SLOTS_0 = (1 << 0), + SLOTS_1 = (1 << 1), + SLOTS_2 = (1 << 2), + SLOTS_3 = (1 << 3), + SLOTS_01 = SLOTS_0 | SLOTS_1, + SLOTS_23 = SLOTS_2 | SLOTS_3, + SLOTS_0123 = SLOTS_0 | SLOTS_1 | SLOTS_2 | SLOTS_3, +} SlotMask; + +SlotMask find_iclass_slots(Opcode opcode, int itype); + +#endif diff --git a/target/hexagon/imported/iclass.def b/target/hexagon/imported/iclass.def new file mode 100644 index 0000000..fb57968 --- /dev/null +++ b/target/hexagon/imported/iclass.def @@ -0,0 +1,51 @@ +/* + * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +/* DEF_*(TYPE,SLOTS,UNITS) */ +DEF_PP_ICLASS32(EXTENDER,0123,LDST|SUNIT|MUNIT) /* 0 */ +DEF_PP_ICLASS32(CJ,0123,CTRLFLOW) /* 1 */ +DEF_PP_ICLASS32(NCJ,01,LDST|CTRLFLOW) /* 2 */ +DEF_PP_ICLASS32(V4LDST,01,LDST) /* 3 */ +DEF_PP_ICLASS32(V2LDST,01,LDST) /* 4 */ +DEF_PP_ICLASS32(J,0123,CTRLFLOW) /* 5 */ +DEF_PP_ICLASS32(CR,3,SUNIT) /* 6 */ +DEF_PP_ICLASS32(ALU32_2op,0123,LDST|SUNIT|MUNIT) /* 7 */ +DEF_PP_ICLASS32(S_2op,23,SUNIT|MUNIT) /* 8 */ +DEF_PP_ICLASS32(LD,01,LDST) /* 9 */ +DEF_PP_ICLASS32(ST,01,LDST) /* 10 */ +DEF_PP_ICLASS32(ALU32_ADDI,0123,LDST|SUNIT|MUNIT) /* 11 */ +DEF_PP_ICLASS32(S_3op,23,SUNIT|MUNIT) /* 12 */ +DEF_PP_ICLASS32(ALU64,23,SUNIT|MUNIT) /* 13 */ +DEF_PP_ICLASS32(M,23,SUNIT|MUNIT) /* 14 */ +DEF_PP_ICLASS32(ALU32_3op,0123,LDST|SUNIT|MUNIT) /* 15 */ + +DEF_EE_ICLASS32(EE0,01,INVALID) /* 0 */ +DEF_EE_ICLASS32(EE1,01,INVALID) /* 1 */ +DEF_EE_ICLASS32(EE2,01,INVALID) /* 2 */ +DEF_EE_ICLASS32(EE3,01,INVALID) /* 3 */ +DEF_EE_ICLASS32(EE4,01,INVALID) /* 4 */ +DEF_EE_ICLASS32(EE5,01,INVALID) /* 5 */ +DEF_EE_ICLASS32(EE6,01,INVALID) /* 6 */ +DEF_EE_ICLASS32(EE7,01,INVALID) /* 7 */ +DEF_EE_ICLASS32(EE8,01,INVALID) /* 8 */ +DEF_EE_ICLASS32(EE9,01,INVALID) /* 9 */ +DEF_EE_ICLASS32(EEA,01,INVALID) /* 10 */ +DEF_EE_ICLASS32(EEB,01,INVALID) /* 11 */ +DEF_EE_ICLASS32(EEC,01,INVALID) /* 12 */ +DEF_EE_ICLASS32(EED,01,INVALID) /* 13 */ +DEF_EE_ICLASS32(EEE,01,INVALID) /* 14 */ +DEF_EE_ICLASS32(EEF,01,INVALID) /* 15 */ |