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authorPeter Maydell <peter.maydell@linaro.org>2021-07-26 13:36:51 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-07-26 13:36:51 +0100
commit1d6f147f043bece029a795c6eb9d43c1abd909b6 (patch)
tree0714e15d96e3f7050ea8b72058525dcbdfbe741d /target/hexagon
parent34fd92ab4142bde5b54adacd16e6682f4ea83da1 (diff)
parent25fc9b79cd057e394f35d7afc18493becd515797 (diff)
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Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20210725' into staging
The Hexagon target was silently failing the SIGSEGV test because the signal handler was not called. Patch 1/2 fixes the Hexagon target Patch 2/2 drops include qemu.h from target/hexagon/op_helper.c **** Changes in v2 **** Drop changes to linux-test.c due to intermittent failures on riscv # gpg: Signature made Sun 25 Jul 2021 22:39:38 BST # gpg: using RSA key 7B0244FB12DE4422 # gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 3635 C788 CE62 B91F D4C5 9AB4 7B02 44FB 12DE 4422 * remotes/quic/tags/pull-hex-20210725: target/hexagon: Drop include of qemu.h Hexagon (target/hexagon) remove put_user_*/get_user_* Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/hexagon')
-rw-r--r--target/hexagon/op_helper.c42
1 files changed, 20 insertions, 22 deletions
diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c
index 4595559..61d5cde 100644
--- a/target/hexagon/op_helper.c
+++ b/target/hexagon/op_helper.c
@@ -16,7 +16,9 @@
*/
#include "qemu/osdep.h"
-#include "qemu.h"
+#include "qemu/log.h"
+#include "exec/exec-all.h"
+#include "exec/cpu_ldst.h"
#include "exec/helper-proto.h"
#include "fpu/softfloat.h"
#include "cpu.h"
@@ -140,22 +142,22 @@ void HELPER(debug_check_store_width)(CPUHexagonState *env, int slot, int check)
void HELPER(commit_store)(CPUHexagonState *env, int slot_num)
{
- switch (env->mem_log_stores[slot_num].width) {
+ uintptr_t ra = GETPC();
+ uint8_t width = env->mem_log_stores[slot_num].width;
+ target_ulong va = env->mem_log_stores[slot_num].va;
+
+ switch (width) {
case 1:
- put_user_u8(env->mem_log_stores[slot_num].data32,
- env->mem_log_stores[slot_num].va);
+ cpu_stb_data_ra(env, va, env->mem_log_stores[slot_num].data32, ra);
break;
case 2:
- put_user_u16(env->mem_log_stores[slot_num].data32,
- env->mem_log_stores[slot_num].va);
+ cpu_stw_data_ra(env, va, env->mem_log_stores[slot_num].data32, ra);
break;
case 4:
- put_user_u32(env->mem_log_stores[slot_num].data32,
- env->mem_log_stores[slot_num].va);
+ cpu_stl_data_ra(env, va, env->mem_log_stores[slot_num].data32, ra);
break;
case 8:
- put_user_u64(env->mem_log_stores[slot_num].data64,
- env->mem_log_stores[slot_num].va);
+ cpu_stq_data_ra(env, va, env->mem_log_stores[slot_num].data64, ra);
break;
default:
g_assert_not_reached();
@@ -393,37 +395,33 @@ static void check_noshuf(CPUHexagonState *env, uint32_t slot)
static uint8_t mem_load1(CPUHexagonState *env, uint32_t slot,
target_ulong vaddr)
{
- uint8_t retval;
+ uintptr_t ra = GETPC();
check_noshuf(env, slot);
- get_user_u8(retval, vaddr);
- return retval;
+ return cpu_ldub_data_ra(env, vaddr, ra);
}
static uint16_t mem_load2(CPUHexagonState *env, uint32_t slot,
target_ulong vaddr)
{
- uint16_t retval;
+ uintptr_t ra = GETPC();
check_noshuf(env, slot);
- get_user_u16(retval, vaddr);
- return retval;
+ return cpu_lduw_data_ra(env, vaddr, ra);
}
static uint32_t mem_load4(CPUHexagonState *env, uint32_t slot,
target_ulong vaddr)
{
- uint32_t retval;
+ uintptr_t ra = GETPC();
check_noshuf(env, slot);
- get_user_u32(retval, vaddr);
- return retval;
+ return cpu_ldl_data_ra(env, vaddr, ra);
}
static uint64_t mem_load8(CPUHexagonState *env, uint32_t slot,
target_ulong vaddr)
{
- uint64_t retval;
+ uintptr_t ra = GETPC();
check_noshuf(env, slot);
- get_user_u64(retval, vaddr);
- return retval;
+ return cpu_ldq_data_ra(env, vaddr, ra);
}
/* Floating point */