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author | Claudio Fontana <cfontana@suse.de> | 2021-02-04 17:39:23 +0100 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2021-02-05 10:24:15 -1000 |
commit | 78271684719f34c1cc19f895e089f2f19b69698d (patch) | |
tree | 5f47406eb8c2be4e37e411e5053678e4d91e09d3 /target/cris | |
parent | c73bdb35a91fb6b17c2c93b1ba381fc88a406f8d (diff) | |
download | qemu-78271684719f34c1cc19f895e089f2f19b69698d.zip qemu-78271684719f34c1cc19f895e089f2f19b69698d.tar.gz qemu-78271684719f34c1cc19f895e089f2f19b69698d.tar.bz2 |
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
we cannot in principle make the TCG Operations field definitions
conditional on CONFIG_TCG in code that is included by both common_ss
and specific_ss modules.
Therefore, what we can do safely to restrict the TCG fields to TCG-only
builds, is to move all tcg cpu operations into a separate header file,
which is only included by TCG, target-specific code.
This leaves just a NULL pointer in the cpu.h for the non-TCG builds.
This also tidies up the code in all targets a bit, having all TCG cpu
operations neatly contained by a dedicated data struct.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20210204163931.7358-16-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/cris')
-rw-r--r-- | target/cris/cpu.c | 43 | ||||
-rw-r--r-- | target/cris/helper.c | 5 |
2 files changed, 32 insertions, 16 deletions
diff --git a/target/cris/cpu.c b/target/cris/cpu.c index b65743e..ed98338 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -193,15 +193,36 @@ static void cris_cpu_initfn(Object *obj) #endif } +#include "hw/core/tcg-cpu-ops.h" + +static struct TCGCPUOps crisv10_tcg_ops = { + .initialize = cris_initialize_crisv10_tcg, + .cpu_exec_interrupt = cris_cpu_exec_interrupt, + .tlb_fill = cris_cpu_tlb_fill, + +#ifndef CONFIG_USER_ONLY + .do_interrupt = crisv10_cpu_do_interrupt, +#endif /* !CONFIG_USER_ONLY */ +}; + +static struct TCGCPUOps crisv32_tcg_ops = { + .initialize = cris_initialize_tcg, + .cpu_exec_interrupt = cris_cpu_exec_interrupt, + .tlb_fill = cris_cpu_tlb_fill, + +#ifndef CONFIG_USER_ONLY + .do_interrupt = cris_cpu_do_interrupt, +#endif /* !CONFIG_USER_ONLY */ +}; + static void crisv8_cpu_class_init(ObjectClass *oc, void *data) { CPUClass *cc = CPU_CLASS(oc); CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); ccc->vr = 8; - cc->tcg_ops.do_interrupt = crisv10_cpu_do_interrupt; cc->gdb_read_register = crisv10_cpu_gdb_read_register; - cc->tcg_ops.initialize = cris_initialize_crisv10_tcg; + cc->tcg_ops = &crisv10_tcg_ops; } static void crisv9_cpu_class_init(ObjectClass *oc, void *data) @@ -210,9 +231,8 @@ static void crisv9_cpu_class_init(ObjectClass *oc, void *data) CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); ccc->vr = 9; - cc->tcg_ops.do_interrupt = crisv10_cpu_do_interrupt; cc->gdb_read_register = crisv10_cpu_gdb_read_register; - cc->tcg_ops.initialize = cris_initialize_crisv10_tcg; + cc->tcg_ops = &crisv10_tcg_ops; } static void crisv10_cpu_class_init(ObjectClass *oc, void *data) @@ -221,9 +241,8 @@ static void crisv10_cpu_class_init(ObjectClass *oc, void *data) CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); ccc->vr = 10; - cc->tcg_ops.do_interrupt = crisv10_cpu_do_interrupt; cc->gdb_read_register = crisv10_cpu_gdb_read_register; - cc->tcg_ops.initialize = cris_initialize_crisv10_tcg; + cc->tcg_ops = &crisv10_tcg_ops; } static void crisv11_cpu_class_init(ObjectClass *oc, void *data) @@ -232,9 +251,8 @@ static void crisv11_cpu_class_init(ObjectClass *oc, void *data) CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); ccc->vr = 11; - cc->tcg_ops.do_interrupt = crisv10_cpu_do_interrupt; cc->gdb_read_register = crisv10_cpu_gdb_read_register; - cc->tcg_ops.initialize = cris_initialize_crisv10_tcg; + cc->tcg_ops = &crisv10_tcg_ops; } static void crisv17_cpu_class_init(ObjectClass *oc, void *data) @@ -243,16 +261,17 @@ static void crisv17_cpu_class_init(ObjectClass *oc, void *data) CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); ccc->vr = 17; - cc->tcg_ops.do_interrupt = crisv10_cpu_do_interrupt; cc->gdb_read_register = crisv10_cpu_gdb_read_register; - cc->tcg_ops.initialize = cris_initialize_crisv10_tcg; + cc->tcg_ops = &crisv10_tcg_ops; } static void crisv32_cpu_class_init(ObjectClass *oc, void *data) { + CPUClass *cc = CPU_CLASS(oc); CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); ccc->vr = 32; + cc->tcg_ops = &crisv32_tcg_ops; } static void cris_cpu_class_init(ObjectClass *oc, void *data) @@ -268,13 +287,10 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = cris_cpu_class_by_name; cc->has_work = cris_cpu_has_work; - cc->tcg_ops.do_interrupt = cris_cpu_do_interrupt; - cc->tcg_ops.cpu_exec_interrupt = cris_cpu_exec_interrupt; cc->dump_state = cris_cpu_dump_state; cc->set_pc = cris_cpu_set_pc; cc->gdb_read_register = cris_cpu_gdb_read_register; cc->gdb_write_register = cris_cpu_gdb_write_register; - cc->tcg_ops.tlb_fill = cris_cpu_tlb_fill; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = cris_cpu_get_phys_page_debug; dc->vmsd = &vmstate_cris_cpu; @@ -284,7 +300,6 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_stop_before_watchpoint = true; cc->disas_set_info = cris_disas_set_info; - cc->tcg_ops.initialize = cris_initialize_tcg; } #define DEFINE_CRIS_CPU_TYPE(cpu_model, initfn) \ diff --git a/target/cris/helper.c b/target/cris/helper.c index 1f4d6f7..7e3bb58 100644 --- a/target/cris/helper.c +++ b/target/cris/helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "hw/core/tcg-cpu-ops.h" #include "mmu.h" #include "qemu/host-utils.h" #include "exec/exec-all.h" @@ -299,7 +300,7 @@ bool cris_cpu_exec_interrupt(CPUState *cs, int interrupt_request) && (env->pregs[PR_CCS] & I_FLAG) && !env->locked_irq) { cs->exception_index = EXCP_IRQ; - cc->tcg_ops.do_interrupt(cs); + cc->tcg_ops->do_interrupt(cs); ret = true; } if (interrupt_request & CPU_INTERRUPT_NMI) { @@ -311,7 +312,7 @@ bool cris_cpu_exec_interrupt(CPUState *cs, int interrupt_request) } if ((env->pregs[PR_CCS] & m_flag_archval)) { cs->exception_index = EXCP_NMI; - cc->tcg_ops.do_interrupt(cs); + cc->tcg_ops->do_interrupt(cs); ret = true; } } |