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author | Richard Henderson <richard.henderson@linaro.org> | 2021-10-19 20:17:05 -0700 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2021-10-22 23:35:47 +1000 |
commit | 673be37163cb44d2e1699503ccd065e9d13d4db7 (patch) | |
tree | 721a6b2ea60c7950e6dce0ae8972538b7004b12a /target/avr | |
parent | 80347ae9f26dfafbd358d7d8d9ad175a2a624365 (diff) | |
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target/riscv: Adjust trans_rev8_32 for riscv64
When target_long is 64-bit, we still want a 32-bit bswap for rev8.
Since this opcode is specific to RV32, we need not conditionalize.
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20211020031709.359469-12-richard.henderson@linaro.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/avr')
0 files changed, 0 insertions, 0 deletions