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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-05-17 12:51:31 +0200
committerRichard Henderson <richard.henderson@linaro.org>2021-05-26 15:33:59 -0700
commit8b80bd28a5cf8d8af7d38abcf1c7d81a1b226ec3 (patch)
tree3605e96525b415e0d739591836978f4d131c5f4a /target/avr
parentc2cf139d9c2f8f8b86686fe0e94a9daba27195a6 (diff)
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cpu: Introduce SysemuCPUOps structure
Introduce a structure to hold handler specific to sysemu. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210517105140.1062037-15-f4bug@amsat.org> [rth: Squash "restrict hw/core/sysemu-cpu-ops.h" patch] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/avr')
-rw-r--r--target/avr/cpu.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 3353bcb..b95caf8 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -184,6 +184,11 @@ static void avr_cpu_dump_state(CPUState *cs, FILE *f, int flags)
qemu_fprintf(f, "\n");
}
+#include "hw/core/sysemu-cpu-ops.h"
+
+static const struct SysemuCPUOps avr_sysemu_ops = {
+};
+
#include "hw/core/tcg-cpu-ops.h"
static struct TCGCPUOps avr_tcg_ops = {
@@ -214,6 +219,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
cc->memory_rw_debug = avr_cpu_memory_rw_debug;
cc->get_phys_page_debug = avr_cpu_get_phys_page_debug;
dc->vmsd = &vms_avr_cpu;
+ cc->sysemu_ops = &avr_sysemu_ops;
cc->disas_set_info = avr_cpu_disas_set_info;
cc->gdb_read_register = avr_cpu_gdb_read_register;
cc->gdb_write_register = avr_cpu_gdb_write_register;