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| author | Michael Rolnik <mrolnik@gmail.com> | 2020-01-24 01:51:13 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-07-11 11:02:05 +0200 |
| commit | 5718cef05a0fe306646dd0481eb6ccf4fef3979e (patch) | |
| tree | 96b88602f3de54c4fd5f9b3b60e3ff74161c23fb /target/avr/insn.decode | |
| parent | 9732b024f79217fbc685895791c4897d14096ef3 (diff) | |
| download | qemu-5718cef05a0fe306646dd0481eb6ccf4fef3979e.zip qemu-5718cef05a0fe306646dd0481eb6ccf4fef3979e.tar.gz qemu-5718cef05a0fe306646dd0481eb6ccf4fef3979e.tar.bz2 | |
target/avr: Add instruction translation - Bit and Bit-test Instructions
This includes:
- LSR, ROR
- ASR
- SWAP
- SBI, CBI
- BST, BLD
- BSET, BCLR
Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Message-Id: <20200705140315.260514-15-huth@tuxfamily.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'target/avr/insn.decode')
| -rw-r--r-- | target/avr/insn.decode | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/target/avr/insn.decode b/target/avr/insn.decode index 279ddfb..7bb6ce7 100644 --- a/target/avr/insn.decode +++ b/target/avr/insn.decode @@ -163,3 +163,17 @@ XCH 1001 001 rd:5 0100 LAC 1001 001 rd:5 0110 LAS 1001 001 rd:5 0101 LAT 1001 001 rd:5 0111 + +# +# Bit and Bit-test Instructions +# +LSR 1001 010 rd:5 0110 +ROR 1001 010 rd:5 0111 +ASR 1001 010 rd:5 0101 +SWAP 1001 010 rd:5 0010 +SBI 1001 1010 reg:5 bit:3 +CBI 1001 1000 reg:5 bit:3 +BST 1111 101 rd:5 0 bit:3 +BLD 1111 100 rd:5 0 bit:3 +BSET 1001 0100 0 bit:3 1000 +BCLR 1001 0100 1 bit:3 1000 |