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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-06-08 19:38:50 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-06-08 19:38:50 +0100 |
| commit | 47ff5ba9d08c2c769794a59b88f1c19ada004730 (patch) | |
| tree | 73a909b95f031e4566e18e6ec7188213da791fe7 /target/arm | |
| parent | 2c1f429df38822ce6955224d784f1567f8af219f (diff) | |
| download | qemu-47ff5ba9d08c2c769794a59b88f1c19ada004730.zip qemu-47ff5ba9d08c2c769794a59b88f1c19ada004730.tar.gz qemu-47ff5ba9d08c2c769794a59b88f1c19ada004730.tar.bz2 | |
target/arm: Move m_is_{ppb,system}_region to ptw.c
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220604040607.269301-13-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm')
| -rw-r--r-- | target/arm/helper.c | 15 | ||||
| -rw-r--r-- | target/arm/ptw.c | 16 | ||||
| -rw-r--r-- | target/arm/ptw.h | 3 |
3 files changed, 16 insertions, 18 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index d6a749a..d2ef123 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11677,21 +11677,6 @@ do_fault: return true; } -bool m_is_ppb_region(CPUARMState *env, uint32_t address) -{ - /* True if address is in the M profile PPB region 0xe0000000 - 0xe00fffff */ - return arm_feature(env, ARM_FEATURE_M) && - extract32(address, 20, 12) == 0xe00; -} - -bool m_is_system_region(CPUARMState *env, uint32_t address) -{ - /* True if address is in the M profile system region - * 0xe0000000 - 0xffffffff - */ - return arm_feature(env, ARM_FEATURE_M) && extract32(address, 29, 3) == 0x7; -} - /* Combine either inner or outer cacheability attributes for normal * memory, according to table D4-42 and pseudocode procedure * CombineS1S2AttrHints() of ARM DDI 0487B.b (the ARMv8 ARM). diff --git a/target/arm/ptw.c b/target/arm/ptw.c index c15fba4..32ba2e5 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -416,6 +416,22 @@ static void get_phys_addr_pmsav7_default(CPUARMState *env, ARMMMUIdx mmu_idx, } } +static bool m_is_ppb_region(CPUARMState *env, uint32_t address) +{ + /* True if address is in the M profile PPB region 0xe0000000 - 0xe00fffff */ + return arm_feature(env, ARM_FEATURE_M) && + extract32(address, 20, 12) == 0xe00; +} + +static bool m_is_system_region(CPUARMState *env, uint32_t address) +{ + /* + * True if address is in the M profile system region + * 0xe0000000 - 0xffffffff + */ + return arm_feature(env, ARM_FEATURE_M) && extract32(address, 29, 3) == 0x7; +} + static bool pmsav7_use_background_region(ARMCPU *cpu, ARMMMUIdx mmu_idx, bool is_user) { diff --git a/target/arm/ptw.h b/target/arm/ptw.h index d2d2711..6c47a57 100644 --- a/target/arm/ptw.h +++ b/target/arm/ptw.h @@ -33,9 +33,6 @@ simple_ap_to_rw_prot(CPUARMState *env, ARMMMUIdx mmu_idx, int ap) return simple_ap_to_rw_prot_is_user(ap, regime_is_user(env, mmu_idx)); } -bool m_is_ppb_region(CPUARMState *env, uint32_t address); -bool m_is_system_region(CPUARMState *env, uint32_t address); - bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, bool s1_is_el0, |