diff options
author | Jean-Hugues DeschĂȘnes <Jean-Hugues.Deschenes@ossiaco.com> | 2019-11-26 13:55:36 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2019-11-26 13:55:36 +0000 |
commit | f900b1e5b087a02199fbb6de7038828008e9e419 (patch) | |
tree | 28fa5ced49099f7d06556ad80c54a3d932c8f170 /target/arm | |
parent | 4ecc984210ca1bf508a96a550ec8a93a5f833f6c (diff) | |
download | qemu-f900b1e5b087a02199fbb6de7038828008e9e419.zip qemu-f900b1e5b087a02199fbb6de7038828008e9e419.tar.gz qemu-f900b1e5b087a02199fbb6de7038828008e9e419.tar.bz2 |
target/arm: Fix handling of cortex-m FTYPE flag in EXCRET
According to the PushStack() pseudocode in the armv7m RM,
bit 4 of the LR should be set to NOT(CONTROL.PFCA) when
an FPU is present. Current implementation is doing it for
armv8, but not for armv7. This patch makes the existing
logic applicable to both code paths.
Signed-off-by: Jean-Hugues Deschenes <jean-hugues.deschenes@ossiaco.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm')
-rw-r--r-- | target/arm/m_helper.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index 4a48b79..76de317 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -2233,19 +2233,18 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) if (env->v7m.secure) { lr |= R_V7M_EXCRET_S_MASK; } - if (!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK)) { - lr |= R_V7M_EXCRET_FTYPE_MASK; - } } else { lr = R_V7M_EXCRET_RES1_MASK | R_V7M_EXCRET_S_MASK | R_V7M_EXCRET_DCRS_MASK | - R_V7M_EXCRET_FTYPE_MASK | R_V7M_EXCRET_ES_MASK; if (env->v7m.control[M_REG_NS] & R_V7M_CONTROL_SPSEL_MASK) { lr |= R_V7M_EXCRET_SPSEL_MASK; } } + if (!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK)) { + lr |= R_V7M_EXCRET_FTYPE_MASK; + } if (!arm_v7m_is_handler_mode(env)) { lr |= R_V7M_EXCRET_MODE_MASK; } |