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| author | Peter Maydell <peter.maydell@linaro.org> | 2019-06-11 16:39:50 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-06-13 15:14:05 +0100 |
| commit | 17552b979ebb9848a534c25ebed18a1072710058 (patch) | |
| tree | 03ad4feeb3a4bf37d14d1919158f824b51743525 /target/arm | |
| parent | b8474540cbce4e2fa45010416375d1bcbe86dc15 (diff) | |
| download | qemu-17552b979ebb9848a534c25ebed18a1072710058.zip qemu-17552b979ebb9848a534c25ebed18a1072710058.tar.gz qemu-17552b979ebb9848a534c25ebed18a1072710058.tar.bz2 | |
target/arm: Convert VMOV (register) to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/arm')
| -rw-r--r-- | target/arm/translate-vfp.inc.c | 10 | ||||
| -rw-r--r-- | target/arm/translate.c | 8 | ||||
| -rw-r--r-- | target/arm/vfp.decode | 5 |
3 files changed, 16 insertions, 7 deletions
diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c index ae2f77a..a7e4ae3 100644 --- a/target/arm/translate-vfp.inc.c +++ b/target/arm/translate-vfp.inc.c @@ -1889,6 +1889,16 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VMOV_imm_dp *a) return true; } +static bool trans_VMOV_reg_sp(DisasContext *s, arg_VMOV_reg_sp *a) +{ + return do_vfp_2op_sp(s, tcg_gen_mov_i32, a->vd, a->vm); +} + +static bool trans_VMOV_reg_dp(DisasContext *s, arg_VMOV_reg_dp *a) +{ + return do_vfp_2op_dp(s, tcg_gen_mov_i64, a->vd, a->vm); +} + static bool trans_VABS_sp(DisasContext *s, arg_VABS_sp *a) { return do_vfp_2op_sp(s, gen_helper_vfp_abss, a->vd, a->vm); diff --git a/target/arm/translate.c b/target/arm/translate.c index 64ebfed..79e9cca 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -3090,7 +3090,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn) return 1; case 15: switch (rn) { - case 1 ... 3: + case 0 ... 3: /* Already handled by decodetree */ return 1; default: @@ -3103,9 +3103,6 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn) if (op == 15) { /* rn is opcode, encoded as per VFP_SREG_N. */ switch (rn) { - case 0x00: /* vmov */ - break; - case 0x04: /* vcvtb.f64.f16, vcvtb.f32.f16 */ case 0x05: /* vcvtt.f64.f16, vcvtt.f32.f16 */ /* @@ -3278,9 +3275,6 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn) switch (op) { case 15: /* extension space */ switch (rn) { - case 0: /* cpy */ - /* no-op */ - break; case 4: /* vcvtb.f32.f16, vcvtb.f64.f16 */ { TCGv_ptr fpst = get_fpstatus_ptr(false); diff --git a/target/arm/vfp.decode b/target/arm/vfp.decode index 2780e1e..b72ab8b 100644 --- a/target/arm/vfp.decode +++ b/target/arm/vfp.decode @@ -157,6 +157,11 @@ VMOV_imm_sp ---- 1110 1.11 imm4h:4 .... 1010 0000 imm4l:4 \ VMOV_imm_dp ---- 1110 1.11 imm4h:4 .... 1011 0000 imm4l:4 \ vd=%vd_dp +VMOV_reg_sp ---- 1110 1.11 0000 .... 1010 01.0 .... \ + vd=%vd_sp vm=%vm_sp +VMOV_reg_dp ---- 1110 1.11 0000 .... 1011 01.0 .... \ + vd=%vd_dp vm=%vm_dp + VABS_sp ---- 1110 1.11 0000 .... 1010 11.0 .... \ vd=%vd_sp vm=%vm_sp VABS_dp ---- 1110 1.11 0000 .... 1011 11.0 .... \ |