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author | Peter Maydell <peter.maydell@linaro.org> | 2020-08-28 19:33:25 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2020-09-01 11:19:32 +0100 |
commit | c505bc6a9d50a48f9d89d6cf930e863838a5b367 (patch) | |
tree | 80858c57b58355d8a20131caaa82f99a81b848f7 /target/arm/vfp-uncond.decode | |
parent | a149e2de0b63e3906729ed1d3df7d9ecdb6de5e6 (diff) | |
download | qemu-c505bc6a9d50a48f9d89d6cf930e863838a5b367.zip qemu-c505bc6a9d50a48f9d89d6cf930e863838a5b367.tar.gz qemu-c505bc6a9d50a48f9d89d6cf930e863838a5b367.tar.bz2 |
target/arm: Implement VFP vp16 VCVT-with-specified-rounding-mode
Implement the fp16 versions of the VFP VCVT instruction forms
which convert between floating point and integer with a specified
rounding mode.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200828183354.27913-17-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/vfp-uncond.decode')
-rw-r--r-- | target/arm/vfp-uncond.decode | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/target/arm/vfp-uncond.decode b/target/arm/vfp-uncond.decode index ee700e5..b7cd9d1 100644 --- a/target/arm/vfp-uncond.decode +++ b/target/arm/vfp-uncond.decode @@ -64,7 +64,9 @@ VRINT 1111 1110 1.11 10 rm:2 .... 1011 01.0 .... \ vm=%vm_dp vd=%vd_dp dp=1 # VCVT float to int with specified rounding mode; Vd is always single-precision +VCVT 1111 1110 1.11 11 rm:2 .... 1001 op:1 1.0 .... \ + vm=%vm_sp vd=%vd_sp sz=1 VCVT 1111 1110 1.11 11 rm:2 .... 1010 op:1 1.0 .... \ - vm=%vm_sp vd=%vd_sp dp=0 + vm=%vm_sp vd=%vd_sp sz=2 VCVT 1111 1110 1.11 11 rm:2 .... 1011 op:1 1.0 .... \ - vm=%vm_dp vd=%vd_sp dp=1 + vm=%vm_dp vd=%vd_sp sz=3 |