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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-06-28 14:58:21 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-07-02 11:48:36 +0100 |
| commit | 2c0286dba46526ee6c23b1f28af62a857dace704 (patch) | |
| tree | b8fd9d9ffd9611fb3655e7ce02da58e789caa07b /target/arm/translate.h | |
| parent | dfd66bc0f37dde37b8b2d7bad3a7075332e75fb4 (diff) | |
| download | qemu-2c0286dba46526ee6c23b1f28af62a857dace704.zip qemu-2c0286dba46526ee6c23b1f28af62a857dace704.tar.gz qemu-2c0286dba46526ee6c23b1f28af62a857dace704.tar.bz2 | |
target/arm: Use asimd_imm_const for A64 decode
The A64 AdvSIMD modified-immediate grouping uses almost the same
constant encoding that A32 Neon does; reuse asimd_imm_const() (to
which we add the AArch64-specific case for cmode 15 op 1) instead of
reimplementing it all.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210628135835.6690-5-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/translate.h')
| -rw-r--r-- | target/arm/translate.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/arm/translate.h b/target/arm/translate.h index 6c8d5f6..e2f056c 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -540,7 +540,8 @@ static inline MemOp finalize_memop(DisasContext *s, MemOp opc) * VMVN and VBIC (when cmode < 14 && op == 1). * * The combination cmode == 15 op == 1 is a reserved encoding for AArch32; - * callers must catch this. + * callers must catch this; we return the 64-bit constant value defined + * for AArch64. * * cmode = 2,3,4,5,6,7,10,11,12,13 imm=0 was UNPREDICTABLE in v7A but * is either not unpredictable or merely CONSTRAINED UNPREDICTABLE in v8A; |