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authorRichard Henderson <richard.henderson@linaro.org>2019-02-05 16:52:39 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-02-05 16:52:39 +0000
commit4a9ee99db38ba513bf1e8f43665b79c60accd017 (patch)
treeb6457595eb7c254a3c2b60ddca9ee47bcad67d83 /target/arm/translate.h
parent06bf3b153acb93a341a90fb76258d8337cbede9b (diff)
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target/arm: Add TBFLAG_A64_TBID, split out gen_top_byte_ignore
Split out gen_top_byte_ignore in preparation of handling these data accesses; the new tbflags field is not yet honored. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190204132126.3255-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate.h')
-rw-r--r--target/arm/translate.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/target/arm/translate.h b/target/arm/translate.h
index f73939d..17748dd 100644
--- a/target/arm/translate.h
+++ b/target/arm/translate.h
@@ -26,7 +26,8 @@ typedef struct DisasContext {
int user;
#endif
ARMMMUIdx mmu_idx; /* MMU index to use for normal loads/stores */
- uint8_t tbii; /* TBI1|TBI0 for EL0/1 or TBI for EL2/3 */
+ uint8_t tbii; /* TBI1|TBI0 for insns */
+ uint8_t tbid; /* TBI1|TBI0 for data */
bool ns; /* Use non-secure CPREG bank on access */
int fp_excp_el; /* FP exception EL or 0 if enabled */
int sve_excp_el; /* SVE exception EL or 0 if enabled */