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authorRichard Henderson <richard.henderson@linaro.org>2020-11-02 16:52:14 +0000
committerPeter Maydell <peter.maydell@linaro.org>2020-11-02 16:52:14 +0000
commitb38b96ca90827012ab8eb045c1337cea83a54c4b (patch)
tree92455dc2e1d6fc15eb6a4c8527bb8590590e19b9 /target/arm/translate.c
parent0aa8e700a53b0aa7275ed747b8fa3acb61d35f2d (diff)
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target/arm: Rename neon_load_reg64 to vfp_load_reg64
The only uses of this function are for loading VFP double-precision values, and nothing to do with NEON. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201030022618.785675-10-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate.c')
-rw-r--r--target/arm/translate.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 4fb0a62..7611c1f 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -1132,14 +1132,14 @@ static long vfp_reg_offset(bool dp, unsigned reg)
}
}
-static inline void neon_load_reg64(TCGv_i64 var, int reg)
+static inline void vfp_load_reg64(TCGv_i64 var, int reg)
{
- tcg_gen_ld_i64(var, cpu_env, vfp_reg_offset(1, reg));
+ tcg_gen_ld_i64(var, cpu_env, vfp_reg_offset(true, reg));
}
-static inline void neon_store_reg64(TCGv_i64 var, int reg)
+static inline void vfp_store_reg64(TCGv_i64 var, int reg)
{
- tcg_gen_st_i64(var, cpu_env, vfp_reg_offset(1, reg));
+ tcg_gen_st_i64(var, cpu_env, vfp_reg_offset(true, reg));
}
static inline void vfp_load_reg32(TCGv_i32 var, int reg)