aboutsummaryrefslogtreecommitdiff
path: root/target/arm/translate-mve.c
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2021-06-17 13:16:25 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-06-24 14:58:48 +0100
commit67ec113b119360092dee679ca0f5eca8ac60992c (patch)
tree6bf1cb50c8194f142949a20a6288cc1838460d8f /target/arm/translate-mve.c
parent89bc4c4f78c2435fdf8dc10b650cfe73c75f1f2c (diff)
downloadqemu-67ec113b119360092dee679ca0f5eca8ac60992c.zip
qemu-67ec113b119360092dee679ca0f5eca8ac60992c.tar.gz
qemu-67ec113b119360092dee679ca0f5eca8ac60992c.tar.bz2
target/arm: Implement MVE VCADD
Implement the MVE VCADD insn, which performs a complex add with rotate. Note that the size=0b11 encoding is VSBC. The architecture grants some leeway for the "destination and Vm source overlap" case for the size MO_32 case, but we choose not to make use of it, instead always calculating all 16 bytes worth of results before setting the destination register. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210617121628.20116-42-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/translate-mve.c')
-rw-r--r--target/arm/translate-mve.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c
index f8cc608..b164907 100644
--- a/target/arm/translate-mve.c
+++ b/target/arm/translate-mve.c
@@ -420,6 +420,13 @@ DO_2OP(VQRDMLSDH, vqrdmlsdh)
DO_2OP(VQRDMLSDHX, vqrdmlsdhx)
DO_2OP(VRHADD_S, vrhadds)
DO_2OP(VRHADD_U, vrhaddu)
+/*
+ * VCADD Qd == Qm at size MO_32 is UNPREDICTABLE; we choose not to diagnose
+ * so we can reuse the DO_2OP macro. (Our implementation calculates the
+ * "expected" results in this case.)
+ */
+DO_2OP(VCADD90, vcadd90)
+DO_2OP(VCADD270, vcadd270)
static bool trans_VQDMULLB(DisasContext *s, arg_2op *a)
{