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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-10-20 13:06:36 +1000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-10-20 11:27:52 +0100 |
| commit | 55086e628ffcb35c71317b310d9caf6f718ae870 (patch) | |
| tree | 61101305a519e0ab0adc755ee5866c662bdfc289 /target/arm/translate-m-nocp.c | |
| parent | c44c8b8b99959068801726be97b6a444ee2989bc (diff) | |
| download | qemu-55086e628ffcb35c71317b310d9caf6f718ae870.zip qemu-55086e628ffcb35c71317b310d9caf6f718ae870.tar.gz qemu-55086e628ffcb35c71317b310d9caf6f718ae870.tar.bz2 | |
target/arm: Change gen_exception_insn* to work on displacements
In preparation for TARGET_TB_PCREL, reduce reliance on absolute values.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20221020030641.2066807-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-m-nocp.c')
| -rw-r--r-- | target/arm/translate-m-nocp.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target/arm/translate-m-nocp.c b/target/arm/translate-m-nocp.c index 4029d7f..694fae7 100644 --- a/target/arm/translate-m-nocp.c +++ b/target/arm/translate-m-nocp.c @@ -143,7 +143,7 @@ static bool trans_VSCCLRM(DisasContext *s, arg_VSCCLRM *a) tcg_gen_brcondi_i32(TCG_COND_EQ, sfpa, 0, s->condlabel); if (s->fp_excp_el != 0) { - gen_exception_insn_el(s, s->pc_curr, EXCP_NOCP, + gen_exception_insn_el(s, 0, EXCP_NOCP, syn_uncategorized(), s->fp_excp_el); return true; } @@ -765,12 +765,12 @@ static bool trans_NOCP(DisasContext *s, arg_nocp *a) } if (a->cp != 10) { - gen_exception_insn(s, s->pc_curr, EXCP_NOCP, syn_uncategorized()); + gen_exception_insn(s, 0, EXCP_NOCP, syn_uncategorized()); return true; } if (s->fp_excp_el != 0) { - gen_exception_insn_el(s, s->pc_curr, EXCP_NOCP, + gen_exception_insn_el(s, 0, EXCP_NOCP, syn_uncategorized(), s->fp_excp_el); return true; } |