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| author | Richard Henderson <richard.henderson@linaro.org> | 2018-05-18 17:48:08 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-05-18 17:48:08 +0100 |
| commit | 38388f7ee3adc04a7e7246c04352451c4f8d00fb (patch) | |
| tree | 9be6c60b0e9e36c4ed7d84d45cec6acc3187d750 /target/arm/translate-a64.c | |
| parent | 8c71baedb8055beaa681823206ee3a74f9f8649a (diff) | |
| download | qemu-38388f7ee3adc04a7e7246c04352451c4f8d00fb.zip qemu-38388f7ee3adc04a7e7246c04352451c4f8d00fb.tar.gz qemu-38388f7ee3adc04a7e7246c04352451c4f8d00fb.tar.bz2 | |
target/arm: Add SVE decode skeleton
Including only 4, as-yet unimplemented, instruction patterns
so that the whole thing compiles.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-a64.c')
| -rw-r--r-- | target/arm/translate-a64.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 74ef756..b32332c 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -13676,9 +13676,14 @@ static void disas_a64_insn(CPUARMState *env, DisasContext *s) s->fp_access_checked = false; switch (extract32(insn, 25, 4)) { - case 0x0: case 0x1: case 0x2: case 0x3: /* UNALLOCATED */ + case 0x0: case 0x1: case 0x3: /* UNALLOCATED */ unallocated_encoding(s); break; + case 0x2: + if (!arm_dc_feature(s, ARM_FEATURE_SVE) || !disas_sve(s, insn)) { + unallocated_encoding(s); + } + break; case 0x8: case 0x9: /* Data processing - immediate */ disas_data_proc_imm(s, insn); break; |