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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-03-01 12:04:56 -0800 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-03-05 15:55:08 +0000 |
| commit | 22ac3c49641f6eed93dca5b852030b4d3eacf6c4 (patch) | |
| tree | 4293551886f32dbfae54b971606293791b69818b /target/arm/translate-a64.c | |
| parent | ff730e9666a716b669ac4a8ca7c521177d1d2b15 (diff) | |
| download | qemu-22ac3c49641f6eed93dca5b852030b4d3eacf6c4.zip qemu-22ac3c49641f6eed93dca5b852030b4d3eacf6c4.tar.gz qemu-22ac3c49641f6eed93dca5b852030b4d3eacf6c4.tar.bz2 | |
target/arm: Add set/clear_pstate_bits, share gen_ss_advance
We do not need an out-of-line helper for manipulating bits in pstate.
While changing things, share the implementation of gen_ss_advance.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190301200501.16533-6-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-a64.c')
| -rw-r--r-- | target/arm/translate-a64.c | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 1e49d33..eaeb435 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -421,17 +421,6 @@ static void gen_exception_bkpt_insn(DisasContext *s, int offset, s->base.is_jmp = DISAS_NORETURN; } -static void gen_ss_advance(DisasContext *s) -{ - /* If the singlestep state is Active-not-pending, advance to - * Active-pending. - */ - if (s->ss_active) { - s->pstate_ss = 0; - gen_helper_clear_pstate_ss(cpu_env); - } -} - static void gen_step_complete_exception(DisasContext *s) { /* We just completed step of an insn. Move from Active-not-pending |