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author | Richard Henderson <richard.henderson@linaro.org> | 2018-06-29 15:11:05 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2018-06-29 15:11:05 +0100 |
commit | 684598640dc3b28f86ccc28cc9af50ba257f4cc8 (patch) | |
tree | d0cf928ce82698516b8daf499e725ba9d5b4c8f4 /target/arm/sve.decode | |
parent | 7f9ddf64d5fe5bfaa91ae0ec52217d86f4d86452 (diff) | |
download | qemu-684598640dc3b28f86ccc28cc9af50ba257f4cc8.zip qemu-684598640dc3b28f86ccc28cc9af50ba257f4cc8.tar.gz qemu-684598640dc3b28f86ccc28cc9af50ba257f4cc8.tar.bz2 |
target/arm: Implement SVE load and broadcast element
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/sve.decode')
-rw-r--r-- | target/arm/sve.decode | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target/arm/sve.decode b/target/arm/sve.decode index 675b81a..765e7e4 100644 --- a/target/arm/sve.decode +++ b/target/arm/sve.decode @@ -28,6 +28,7 @@ %imm8_16_10 16:5 10:3 %imm9_16_10 16:s6 10:3 %size_23 23:2 +%dtype_23_13 23:2 13:2 # A combination of tsz:imm3 -- extract esize. %tszimm_esz 22:2 5:5 !function=tszimm_esz @@ -751,6 +752,10 @@ LDR_pri 10000101 10 ...... 000 ... ..... 0 .... @pd_rn_i9 # SVE load vector register LDR_zri 10000101 10 ...... 010 ... ..... ..... @rd_rn_i9 +# SVE load and broadcast element +LD1R_zpri 1000010 .. 1 imm:6 1.. pg:3 rn:5 rd:5 \ + &rpri_load dtype=%dtype_23_13 nreg=0 + ### SVE Memory Contiguous Load Group # SVE contiguous load (scalar plus scalar) |