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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-09-01 09:02:35 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-01 11:08:16 +0100 |
| commit | 104afc68cf6fbd518e202647e996a14dd0c70130 (patch) | |
| tree | 19a3e1fd99a4388338543f2ca78fc307b84502d0 /target/arm/mve_helper.c | |
| parent | 82af0153d3a92230211b326b90f953a7e1877e29 (diff) | |
| download | qemu-104afc68cf6fbd518e202647e996a14dd0c70130.zip qemu-104afc68cf6fbd518e202647e996a14dd0c70130.tar.gz qemu-104afc68cf6fbd518e202647e996a14dd0c70130.tar.bz2 | |
target/arm: Implement MVE VCADD
Implement the MVE VCADD insn. Note that here the size bit is the
opposite sense to the other 2-operand fp insns.
We don't check for the sz == 1 && Qd == Qm UNPREDICTABLE case,
because that would mean we can't use the DO_2OP_FP macro in
translate-mve.c.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/mve_helper.c')
| -rw-r--r-- | target/arm/mve_helper.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/target/arm/mve_helper.c b/target/arm/mve_helper.c index d6bc686..2cc8b3e 100644 --- a/target/arm/mve_helper.c +++ b/target/arm/mve_helper.c @@ -2854,3 +2854,43 @@ static inline float32 float32_abd(float32 a, float32 b, float_status *s) DO_2OP_FP_ALL(vfabd, abd) DO_2OP_FP_ALL(vmaxnm, maxnum) DO_2OP_FP_ALL(vminnm, minnum) + +#define DO_VCADD_FP(OP, ESIZE, TYPE, FN0, FN1) \ + void HELPER(glue(mve_, OP))(CPUARMState *env, \ + void *vd, void *vn, void *vm) \ + { \ + TYPE *d = vd, *n = vn, *m = vm; \ + TYPE r[16 / ESIZE]; \ + uint16_t tm, mask = mve_element_mask(env); \ + unsigned e; \ + float_status *fpst; \ + float_status scratch_fpst; \ + /* Calculate all results first to avoid overwriting inputs */ \ + for (e = 0, tm = mask; e < 16 / ESIZE; e++, tm >>= ESIZE) { \ + if ((tm & MAKE_64BIT_MASK(0, ESIZE)) == 0) { \ + r[e] = 0; \ + continue; \ + } \ + fpst = (ESIZE == 2) ? &env->vfp.standard_fp_status_f16 : \ + &env->vfp.standard_fp_status; \ + if (!(tm & 1)) { \ + /* We need the result but without updating flags */ \ + scratch_fpst = *fpst; \ + fpst = &scratch_fpst; \ + } \ + if (!(e & 1)) { \ + r[e] = FN0(n[H##ESIZE(e)], m[H##ESIZE(e + 1)], fpst); \ + } else { \ + r[e] = FN1(n[H##ESIZE(e)], m[H##ESIZE(e - 1)], fpst); \ + } \ + } \ + for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) { \ + mergemask(&d[H##ESIZE(e)], r[e], mask); \ + } \ + mve_advance_vpt(env); \ + } + +DO_VCADD_FP(vfcadd90h, 2, float16, float16_sub, float16_add) +DO_VCADD_FP(vfcadd90s, 4, float32, float32_sub, float32_add) +DO_VCADD_FP(vfcadd270h, 2, float16, float16_add, float16_sub) +DO_VCADD_FP(vfcadd270s, 4, float32, float32_add, float32_sub) |