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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-09-01 09:02:39 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-01 11:08:17 +0100 |
| commit | 98e40fbd792e13e98abd7f3d17f18a24edea4984 (patch) | |
| tree | a7db755e10a3e793958bd9ba322555b852474633 /target/arm/mve.decode | |
| parent | 73d260db3c7597c1efe7541057469358d2e5d001 (diff) | |
| download | qemu-98e40fbd792e13e98abd7f3d17f18a24edea4984.zip qemu-98e40fbd792e13e98abd7f3d17f18a24edea4984.tar.gz qemu-98e40fbd792e13e98abd7f3d17f18a24edea4984.tar.bz2 | |
target/arm: Implement MVE VRINT insns
Implement the MVE VRINT insns, which round floating point inputs
to integer values, leaving them in floating point format.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/arm/mve.decode')
| -rw-r--r-- | target/arm/mve.decode | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target/arm/mve.decode b/target/arm/mve.decode index 10f0f1d..14a4f39 100644 --- a/target/arm/mve.decode +++ b/target/arm/mve.decode @@ -823,3 +823,10 @@ VCVTPS 1111 1111 1 . 11 .. 11 ... 000 10 0 1 . 0 ... 0 @1op VCVTPU 1111 1111 1 . 11 .. 11 ... 000 10 1 1 . 0 ... 0 @1op VCVTMS 1111 1111 1 . 11 .. 11 ... 000 11 0 1 . 0 ... 0 @1op VCVTMU 1111 1111 1 . 11 .. 11 ... 000 11 1 1 . 0 ... 0 @1op + +VRINTN 1111 1111 1 . 11 .. 10 ... 001 000 1 . 0 ... 0 @1op +VRINTX 1111 1111 1 . 11 .. 10 ... 001 001 1 . 0 ... 0 @1op +VRINTA 1111 1111 1 . 11 .. 10 ... 001 010 1 . 0 ... 0 @1op +VRINTZ 1111 1111 1 . 11 .. 10 ... 001 011 1 . 0 ... 0 @1op +VRINTM 1111 1111 1 . 11 .. 10 ... 001 101 1 . 0 ... 0 @1op +VRINTP 1111 1111 1 . 11 .. 10 ... 001 111 1 . 0 ... 0 @1op |