diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2021-08-13 17:11:52 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-08-25 10:48:49 +0100 |
| commit | 6b895bf8fb088a04a91714a555d2b6234cf1e98d (patch) | |
| tree | 728639ab58524cfe71d7d07a621a471e4eb4a827 /target/arm/mve.decode | |
| parent | c386443b163965e44ae7a7f7858ec7985e97926b (diff) | |
| download | qemu-6b895bf8fb088a04a91714a555d2b6234cf1e98d.zip qemu-6b895bf8fb088a04a91714a555d2b6234cf1e98d.tar.gz qemu-6b895bf8fb088a04a91714a555d2b6234cf1e98d.tar.bz2 | |
target/arm: Implement MVE VMLAS
Implement the MVE VMLAS insn, which multiplies a vector by a vector
and adds a scalar.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/arm/mve.decode')
| -rw-r--r-- | target/arm/mve.decode | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target/arm/mve.decode b/target/arm/mve.decode index 4bd20a9..226b747 100644 --- a/target/arm/mve.decode +++ b/target/arm/mve.decode @@ -345,6 +345,9 @@ VBRSR 1111 1110 0 . .. ... 1 ... 1 1110 . 110 .... @2scalar VQDMULH_scalar 1110 1110 0 . .. ... 1 ... 0 1110 . 110 .... @2scalar VQRDMULH_scalar 1111 1110 0 . .. ... 1 ... 0 1110 . 110 .... @2scalar +# The U bit (28) is don't-care because it does not affect the result +VMLAS 111- 1110 0 . .. ... 1 ... 1 1110 . 100 .... @2scalar + # Vector add across vector { VADDV 111 u:1 1110 1111 size:2 01 ... 0 1111 0 0 a:1 0 qm:3 0 rda=%rdalo |