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authorPeter Maydell <peter.maydell@linaro.org>2021-06-17 13:16:24 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-06-24 14:58:48 +0100
commit89bc4c4f78c2435fdf8dc10b650cfe73c75f1f2c (patch)
tree228b697572633cd029d024ab705e7c3cae31ebde /target/arm/mte_helper.c
parent1eb987a89d944515b05ccd8b913bee7fd0d547ae (diff)
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target/arm: Implement MVE VADC, VSBC
Implement the MVE VADC and VSBC insns. These perform an add-with-carry or subtract-with-carry of the 32-bit elements in each lane of the input vectors, where the carry-out of each add is the carry-in of the next. The initial carry input is either 1 or is from FPSCR.C; the carry out at the end is written back to FPSCR.C. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210617121628.20116-41-peter.maydell@linaro.org
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