diff options
| author | Idan Horowitz <idan.horowitz@gmail.com> | 2022-04-01 15:35:48 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-04-01 15:35:48 +0100 |
| commit | 0da067f2a83c61efc6f1688d4379269420838b28 (patch) | |
| tree | 93e22df606671fb5a41dfdfd52117023b09f1aea /target/arm/internals.h | |
| parent | 9b617b1bb4056e60b39be4c33be20c10928a6a5c (diff) | |
| download | qemu-0da067f2a83c61efc6f1688d4379269420838b28.zip qemu-0da067f2a83c61efc6f1688d4379269420838b28.tar.gz qemu-0da067f2a83c61efc6f1688d4379269420838b28.tar.bz2 | |
target/arm: Fix MTE access checks for disabled SEL2
While not mentioned anywhere in the actual specification text, the
HCR_EL2.ATA bit is treated as '1' when EL2 is disabled at the current
security state. This can be observed in the psuedo-code implementation
of AArch64.AllocationTagAccessIsEnabled().
Signed-off-by: Idan Horowitz <idan.horowitz@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220328173107.311267-1-idan.horowitz@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/internals.h')
| -rw-r--r-- | target/arm/internals.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/internals.h b/target/arm/internals.h index a34be2e..7f696cd3 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1094,7 +1094,7 @@ static inline bool allocation_tag_access_enabled(CPUARMState *env, int el, && !(env->cp15.scr_el3 & SCR_ATA)) { return false; } - if (el < 2 && arm_feature(env, ARM_FEATURE_EL2)) { + if (el < 2 && arm_is_el2_enabled(env)) { uint64_t hcr = arm_hcr_el2_eff(env); if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) { return false; |