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| author | Richard Henderson <richard.henderson@linaro.org> | 2018-12-13 13:48:06 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-12-13 14:41:24 +0000 |
| commit | 037c13c5904f5fc67bb0ab7dd91ae07347aedee9 (patch) | |
| tree | 0cbab51cadc8719228e354e8c596be6ca2377467 /target/arm/cpu64.c | |
| parent | ea22747c63c9a894777aa41a7af85c3d08e39f81 (diff) | |
| download | qemu-037c13c5904f5fc67bb0ab7dd91ae07347aedee9.zip qemu-037c13c5904f5fc67bb0ab7dd91ae07347aedee9.tar.gz qemu-037c13c5904f5fc67bb0ab7dd91ae07347aedee9.tar.bz2 | |
target/arm: Implement the ARMv8.1-HPD extension
Since the TCR_*.HPD bits were RES0 in ARMv8.0, we can simply
interpret the bits as if ARMv8.1-HPD is present without checking.
We will need a slightly different check for hpd for aarch32.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20181203203839.757-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu64.c')
| -rw-r--r-- | target/arm/cpu64.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 0babe48..1a4289c 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -324,6 +324,10 @@ static void aarch64_max_initfn(Object *obj) t = FIELD_DP64(t, ID_AA64PFR0, ADVSIMD, 1); cpu->isar.id_aa64pfr0 = t; + t = cpu->isar.id_aa64mmfr1; + t = FIELD_DP64(t, ID_AA64MMFR1, HPDS, 1); /* HPD */ + cpu->isar.id_aa64mmfr1 = t; + /* Replicate the same data to the 32-bit id registers. */ u = cpu->isar.id_isar5; u = FIELD_DP32(u, ID_ISAR5, AES, 2); /* AES + PMULL */ |