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author | Andrew Jones <drjones@redhat.com> | 2021-08-23 18:06:44 +0200 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2021-08-26 17:01:59 +0100 |
commit | 5401b1e08d468d28de1a7f433062f338fc47bad9 (patch) | |
tree | d23530c5289f3f7830a6a2fcf126488a66288c65 /target/arm/cpu64.c | |
parent | 0659e4680efa5b26244dceb29fb2db754ceaf8af (diff) | |
download | qemu-5401b1e08d468d28de1a7f433062f338fc47bad9.zip qemu-5401b1e08d468d28de1a7f433062f338fc47bad9.tar.gz qemu-5401b1e08d468d28de1a7f433062f338fc47bad9.tar.bz2 |
target/arm/cpu: Introduce sve_vq_supported bitmap
Allow CPUs that support SVE to specify which SVE vector lengths they
support by setting them in this bitmap. Currently only the 'max' and
'host' CPU types supports SVE and 'host' requires KVM which obtains
its supported bitmap from the host. So, we only need to initialize the
bitmap for 'max' with TCG. And, since 'max' should support all SVE
vector lengths we simply fill the bitmap. Future CPU types may have
less trivial maps though.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210823160647.34028-2-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu64.c')
-rw-r--r-- | target/arm/cpu64.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index c690318..eb9318c 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -840,6 +840,8 @@ static void aarch64_max_initfn(Object *obj) /* Default to PAUTH on, with the architected algorithm. */ qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_property); qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_impdef_property); + + bitmap_fill(cpu->sve_vq_supported, ARM_MAX_VQ); } aarch64_add_sve_properties(obj); |