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author | Peter Maydell <peter.maydell@linaro.org> | 2023-09-15 15:37:00 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2023-09-21 16:07:13 +0100 |
commit | 3039b090f2058949edf6a7f1c8e793bc309fa6de (patch) | |
tree | f14ee1a36a3267e5d8c66c0f2b6178a2db861506 /target/arm/cpu.h | |
parent | 5f7b71fb99dc98831d9ad077fe1a58a4b119e952 (diff) | |
download | qemu-3039b090f2058949edf6a7f1c8e793bc309fa6de.zip qemu-3039b090f2058949edf6a7f1c8e793bc309fa6de.tar.gz qemu-3039b090f2058949edf6a7f1c8e793bc309fa6de.tar.bz2 |
target/arm: Implement FEAT_HBC
FEAT_HBC (Hinted conditional branches) provides a new instruction
BC.cond, which behaves exactly like the existing B.cond except
that it provides a hint to the branch predictor about the
likely behaviour of the branch.
Since QEMU does not implement branch prediction, we can treat
this identically to B.cond.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r-- | target/arm/cpu.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 7ba2402..bc7a69a 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -4088,6 +4088,11 @@ static inline bool isar_feature_aa64_i8mm(const ARMISARegisters *id) return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, I8MM) != 0; } +static inline bool isar_feature_aa64_hbc(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64isar2, ID_AA64ISAR2, BC) != 0; +} + static inline bool isar_feature_aa64_tgran4_lpa2(const ARMISARegisters *id) { return FIELD_SEX64(id->id_aa64mmfr0, ID_AA64MMFR0, TGRAN4) >= 1; |