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author | Philippe Mathieu-Daudé <philmd@redhat.com> | 2019-07-04 17:14:43 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2019-07-04 17:14:43 +0100 |
commit | 91f78c58da9ba78c8ed00f5d822b701765be8499 (patch) | |
tree | 20d51e99146ef79f6e977fd01eb4a69eb01bff12 /target/arm/cpu.h | |
parent | 9dd5cca42448770a940fa2145f1ff18cdc7b01a9 (diff) | |
download | qemu-91f78c58da9ba78c8ed00f5d822b701765be8499.zip qemu-91f78c58da9ba78c8ed00f5d822b701765be8499.tar.gz qemu-91f78c58da9ba78c8ed00f5d822b701765be8499.tar.bz2 |
target/arm: Restrict semi-hosting to TCG
Per Peter Maydell:
Semihosting hooks either SVC or HLT instructions, and inside KVM
both of those go to EL1, ie to the guest, and can't be trapped to
KVM.
Let check_for_semihosting() return False when not running on TCG.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190701194942.10092-3-philmd@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r-- | target/arm/cpu.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a9be186..94c990c 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -964,7 +964,14 @@ static inline void aarch64_sve_change_el(CPUARMState *env, int o, { } #endif +#if !defined(CONFIG_TCG) +static inline target_ulong do_arm_semihosting(CPUARMState *env) +{ + g_assert_not_reached(); +} +#else target_ulong do_arm_semihosting(CPUARMState *env); +#endif void aarch64_sync_32_to_64(CPUARMState *env); void aarch64_sync_64_to_32(CPUARMState *env); |