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authorRichard Henderson <richard.henderson@linaro.org>2022-06-20 10:51:45 -0700
committerPeter Maydell <peter.maydell@linaro.org>2022-06-27 11:18:17 +0100
commit9e5ec745e33ad6ace7a01653262dcedf1a5676d3 (patch)
treea72cf5cf17436545c094a2d751827d6f5953b075 /target/arm/cpu.h
parent045e50641fd17655b02c4af485835bca38577bf3 (diff)
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target/arm: Implement TPIDR2_EL0
This register is part of SME, but isn't closely related to the rest of the extension. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r--target/arm/cpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index df677b2..05d1e2e 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -474,6 +474,7 @@ typedef struct CPUArchState {
};
uint64_t tpidr_el[4];
};
+ uint64_t tpidr2_el0;
/* The secure banks of these registers don't map anywhere */
uint64_t tpidrurw_s;
uint64_t tpidrprw_s;