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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-11-19 21:55:51 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-12-10 11:44:55 +0000 |
| commit | cad8e2e3160dd10371552fce6cd8c6e171503e13 (patch) | |
| tree | bcde7749d9e1cf67fce6467318adbc61955e7462 /target/arm/cpu.c | |
| parent | a724377a11a436e711cd91c817ff6428d7ccb829 (diff) | |
| download | qemu-cad8e2e3160dd10371552fce6cd8c6e171503e13.zip qemu-cad8e2e3160dd10371552fce6cd8c6e171503e13.tar.gz qemu-cad8e2e3160dd10371552fce6cd8c6e171503e13.tar.bz2 | |
target/arm: Implement v8.1M PXN extension
In v8.1M the PXN architecture extension adds a new PXN bit to the
MPU_RLAR registers, which forbids execution of code in the region
from a privileged mode.
This is another feature which is just in the generic "in v8.1M" set
and has no ID register field indicating its presence.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201119215617.29887-3-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.c')
0 files changed, 0 insertions, 0 deletions