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authorAndrew Jones <drjones@redhat.com>2019-10-31 15:27:28 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-11-01 20:40:59 +0000
commit73234775ad61892409ef9cbde9100b3bdee8a70f (patch)
tree67b1b028c22a8bc4c3e4f251ab6308113000c558 /target/arm/cpu.c
parentbd31b751a3c1ac964c78f30424c6eb497d7d29db (diff)
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target/arm: Allow SVE to be disabled via a CPU property
Since 97a28b0eeac14 ("target/arm: Allow VFP and Neon to be disabled via a CPU property") we can disable the 'max' cpu model's VFP and neon features, but there's no way to disable SVE. Add the 'sve=on|off' property to give it that flexibility. We also rename cpu_max_get/set_sve_vq to cpu_max_get/set_sve_max_vq in order for them to follow the typical *_get/set_<property-name> pattern. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com> Reviewed-by: Beata Michalska <beata.michalska@linaro.org> Message-id: 20191031142734.8590-4-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.c')
-rw-r--r--target/arm/cpu.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index ab3e1a0..72a27ec 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -200,7 +200,8 @@ static void arm_cpu_reset(CPUState *s)
env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 16, 2, 3);
env->cp15.cptr_el[3] |= CPTR_EZ;
/* with maximum vector length */
- env->vfp.zcr_el[1] = cpu->sve_max_vq - 1;
+ env->vfp.zcr_el[1] = cpu_isar_feature(aa64_sve, cpu) ?
+ cpu->sve_max_vq - 1 : 0;
env->vfp.zcr_el[2] = env->vfp.zcr_el[1];
env->vfp.zcr_el[3] = env->vfp.zcr_el[1];
/*