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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-05-06 13:02:19 -0500 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-05-09 11:47:53 +0100 |
| commit | 696ba3771894f7a0b233e634dc9d401330568e35 (patch) | |
| tree | 1ede6e622bad476a6c37648944e5cb1ca9da69b0 /target/arm/cpregs.h | |
| parent | 14d5addcaedae2e8666aeda71510e1d4be5bb50d (diff) | |
| download | qemu-696ba3771894f7a0b233e634dc9d401330568e35.zip qemu-696ba3771894f7a0b233e634dc9d401330568e35.tar.gz qemu-696ba3771894f7a0b233e634dc9d401330568e35.tar.bz2 | |
target/arm: Handle cpreg registration for missing EL
More gracefully handle cpregs when EL2 and/or EL3 are missing.
If the reg is entirely inaccessible, do not register it at all.
If the reg is for EL2, and EL3 is present but EL2 is not,
either discard, squash to res0, const, or keep unchanged.
Per rule RJFFP, mark the 4 aarch32 hypervisor access registers
with ARM_CP_EL3_NO_EL2_KEEP, and mark all of the EL2 address
translation and tlb invalidation "regs" ARM_CP_EL3_NO_EL2_UNDEF.
Mark the 2 virtualization processor id regs ARM_CP_EL3_NO_EL2_C_NZ.
This will simplify cpreg registration for conditional arm features.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220506180242.216785-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpregs.h')
| -rw-r--r-- | target/arm/cpregs.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/target/arm/cpregs.h b/target/arm/cpregs.h index 7398454..db03d6a 100644 --- a/target/arm/cpregs.h +++ b/target/arm/cpregs.h @@ -102,6 +102,17 @@ enum { ARM_CP_SVE = 1 << 14, /* Flag: Do not expose in gdb sysreg xml. */ ARM_CP_NO_GDB = 1 << 15, + /* + * Flags: If EL3 but not EL2... + * - UNDEF: discard the cpreg, + * - KEEP: retain the cpreg as is, + * - C_NZ: set const on the cpreg, but retain resetvalue, + * - else: set const on the cpreg, zero resetvalue, aka RES0. + * See rule RJFFP in section D1.1.3 of DDI0487H.a. + */ + ARM_CP_EL3_NO_EL2_UNDEF = 1 << 16, + ARM_CP_EL3_NO_EL2_KEEP = 1 << 17, + ARM_CP_EL3_NO_EL2_C_NZ = 1 << 18, }; /* |