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authorRichard Henderson <richard.henderson@linaro.org>2019-03-22 11:51:19 -0700
committerRichard Henderson <richard.henderson@linaro.org>2019-06-10 07:03:34 -0700
commit74433bf083b0766aba81534f92de13194f23ff3e (patch)
tree9c0c63e1d1874a47395bda07f61f160fb611c0e4 /target/alpha
parent79e4208506651660b866f536616a5f8f3175f909 (diff)
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tcg: Split out target/arch/cpu-param.h
For all targets, into this new file move TARGET_LONG_BITS, TARGET_PAGE_BITS, TARGET_PHYS_ADDR_SPACE_BITS, TARGET_VIRT_ADDR_SPACE_BITS, and NB_MMU_MODES. Include this new file from exec/cpu-defs.h. This now removes the somewhat odd requirement that target/arch/cpu.h defines TARGET_LONG_BITS before including exec/cpu-defs.h, so push the bulk of the includes within target/arch/cpu.h to the top. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/alpha')
-rw-r--r--target/alpha/cpu-param.h31
-rw-r--r--target/alpha/cpu.h23
2 files changed, 32 insertions, 22 deletions
diff --git a/target/alpha/cpu-param.h b/target/alpha/cpu-param.h
new file mode 100644
index 0000000..692aee2
--- /dev/null
+++ b/target/alpha/cpu-param.h
@@ -0,0 +1,31 @@
+/*
+ * Alpha cpu parameters for qemu.
+ *
+ * Copyright (c) 2007 Jocelyn Mayer
+ * SPDX-License-Identifier: LGPL-2.0+
+ */
+
+#ifndef ALPHA_CPU_PARAM_H
+#define ALPHA_CPU_PARAM_H 1
+
+#define TARGET_LONG_BITS 64
+#define TARGET_PAGE_BITS 13
+#ifdef CONFIG_USER_ONLY
+/*
+ * ??? The kernel likes to give addresses in high memory. If the host has
+ * more virtual address space than the guest, this can lead to impossible
+ * allocations. Honor the long-standing assumption that only kernel addrs
+ * are negative, but otherwise allow allocations anywhere. This could lead
+ * to tricky emulation problems for programs doing tagged addressing, but
+ * that's far fewer than encounter the impossible allocation problem.
+ */
+#define TARGET_PHYS_ADDR_SPACE_BITS 63
+#define TARGET_VIRT_ADDR_SPACE_BITS 63
+#else
+/* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44. */
+#define TARGET_PHYS_ADDR_SPACE_BITS 44
+#define TARGET_VIRT_ADDR_SPACE_BITS (30 + TARGET_PAGE_BITS)
+#endif
+#define NB_MMU_MODES 3
+
+#endif
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index ba6bc31..dc1883f 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -22,8 +22,8 @@
#include "qemu-common.h"
#include "cpu-qom.h"
+#include "exec/cpu-defs.h"
-#define TARGET_LONG_BITS 64
#define ALIGNED_ONLY
#define CPUArchState struct CPUAlphaState
@@ -31,28 +31,9 @@
/* Alpha processors have a weak memory model */
#define TCG_GUEST_DEFAULT_MO (0)
-#include "exec/cpu-defs.h"
-
#define ICACHE_LINE_SIZE 32
#define DCACHE_LINE_SIZE 32
-#define TARGET_PAGE_BITS 13
-
-#ifdef CONFIG_USER_ONLY
-/* ??? The kernel likes to give addresses in high memory. If the host has
- more virtual address space than the guest, this can lead to impossible
- allocations. Honor the long-standing assumption that only kernel addrs
- are negative, but otherwise allow allocations anywhere. This could lead
- to tricky emulation problems for programs doing tagged addressing, but
- that's far fewer than encounter the impossible allocation problem. */
-#define TARGET_PHYS_ADDR_SPACE_BITS 63
-#define TARGET_VIRT_ADDR_SPACE_BITS 63
-#else
-/* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44. */
-#define TARGET_PHYS_ADDR_SPACE_BITS 44
-#define TARGET_VIRT_ADDR_SPACE_BITS (30 + TARGET_PAGE_BITS)
-#endif
-
/* Alpha major type */
enum {
ALPHA_EV3 = 1,
@@ -217,8 +198,6 @@ enum {
PALcode cheats and usees the KSEG mapping for its code+data rather than
physical addresses. */
-#define NB_MMU_MODES 3
-
#define MMU_MODE0_SUFFIX _kernel
#define MMU_MODE1_SUFFIX _user
#define MMU_KERNEL_IDX 0