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authorRichard Henderson <richard.henderson@linaro.org>2023-10-24 23:00:25 -0700
committerRichard Henderson <richard.henderson@linaro.org>2024-02-03 23:43:50 +0000
commitc47341f1d4fb818428900bbdb6630edfbe3782bf (patch)
tree9544e21dd960233e697c3036f44ca32a9cf5c954 /target/alpha
parentc66ba9786ad16961e3c9ee668f21c284945387bf (diff)
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target/alpha: Use TCG_COND_TST{EQ,NE} for CMOVLB{C,S}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/alpha')
-rw-r--r--target/alpha/translate.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index 566adc4..220eda2 100644
--- a/target/alpha/translate.c
+++ b/target/alpha/translate.c
@@ -1676,16 +1676,12 @@ static DisasJumpType translate_one(DisasContext *ctx, uint32_t insn)
break;
case 0x14:
/* CMOVLBS */
- tmp = tcg_temp_new();
- tcg_gen_andi_i64(tmp, va, 1);
- tcg_gen_movcond_i64(TCG_COND_NE, vc, tmp, load_zero(ctx),
+ tcg_gen_movcond_i64(TCG_COND_TSTNE, vc, va, tcg_constant_i64(1),
vb, load_gpr(ctx, rc));
break;
case 0x16:
/* CMOVLBC */
- tmp = tcg_temp_new();
- tcg_gen_andi_i64(tmp, va, 1);
- tcg_gen_movcond_i64(TCG_COND_EQ, vc, tmp, load_zero(ctx),
+ tcg_gen_movcond_i64(TCG_COND_TSTEQ, vc, va, tcg_constant_i64(1),
vb, load_gpr(ctx, rc));
break;
case 0x20: