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author | Tony Nguyen <tony.nguyen@bt.com> | 2019-08-24 04:10:58 +1000 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2019-09-03 08:30:38 -0700 |
commit | 14776ab5a12972ea439c7fb2203a4c15a09094b4 (patch) | |
tree | b53091625b410a722bf5f4e17a9631457994eed4 /target/alpha/translate.c | |
parent | fec105c2abda8567ec15230429c41429b5ee307c (diff) | |
download | qemu-14776ab5a12972ea439c7fb2203a4c15a09094b4.zip qemu-14776ab5a12972ea439c7fb2203a4c15a09094b4.tar.gz qemu-14776ab5a12972ea439c7fb2203a4c15a09094b4.tar.bz2 |
tcg: TCGMemOp is now accelerator independent MemOp
Preparation for collapsing the two byte swaps, adjust_endianness and
handle_bswap, along the I/O path.
Target dependant attributes are conditionalized upon NEED_CPU_H.
Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <81d9cd7d7f5aaadfa772d6c48ecee834e9cf7882.1566466906.git.tony.nguyen@bt.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/alpha/translate.c')
-rw-r--r-- | target/alpha/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 1e29653..a69f58b 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -403,7 +403,7 @@ static inline void gen_store_mem(DisasContext *ctx, static DisasJumpType gen_store_conditional(DisasContext *ctx, int ra, int rb, int32_t disp16, int mem_idx, - TCGMemOp op) + MemOp op) { TCGLabel *lab_fail, *lab_done; TCGv addr, val; |